1 files changed, 0 insertions, 69 deletions
diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c
index 51f33629f1..087ba2b550 100644
--- a/src/northbridge/intel/sandybridge/raminit_common.c
+++ b/src/northbridge/intel/sandybridge/raminit_common.c
@@ -358,75 +358,6 @@ void dram_zones(ramctr_timing *ctrl, int training)
 	}
 }
 
-#define DEFAULT_TCK	TCK_800MHZ
-
-unsigned int get_mem_min_tck(void)
-{
-	u32 reg32;
-	u8 rev;
-	const struct device *dev;
-	const struct northbridge_intel_sandybridge_config *cfg = NULL;
-
-	dev = pcidev_path_on_root(PCI_DEVFN(0, 0));
-	if (dev)
-		cfg = dev->chip_info;
-
-	/* If this is zero, it just means devicetree.cb didn't set it */
-	if (!cfg || cfg->max_mem_clock_mhz == 0) {
-
-		if (CONFIG(NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES))
-			return TCK_1333MHZ;
-
-		rev = pci_read_config8(HOST_BRIDGE, PCI_DEVICE_ID);
-
-		if ((rev & BASE_REV_MASK) == BASE_REV_SNB) {
-			/* Read Capabilities A Register DMFC bits */
-			reg32 = pci_read_config32(HOST_BRIDGE, CAPID0_A);
-			reg32 &= 0x7;
-
-			switch (reg32) {
-			case 7: return TCK_533MHZ;
-			case 6: return TCK_666MHZ;
-			case 5: return TCK_800MHZ;
-			/* Reserved */
-			default:
-				break;
-			}
-		} else {
-			/* Read Capabilities B Register DMFC bits */
-			reg32 = pci_read_config32(HOST_BRIDGE, CAPID0_B);
-			reg32 = (reg32 >> 4) & 0x7;
-
-			switch (reg32) {
-			case 7: return TCK_533MHZ;
-			case 6: return TCK_666MHZ;
-			case 5: return TCK_800MHZ;
-			case 4: return TCK_933MHZ;
-			case 3: return TCK_1066MHZ;
-			case 2: return TCK_1200MHZ;
-			case 1: return TCK_1333MHZ;
-			/* Reserved */
-			default:
-				break;
-			}
-		}
-		return DEFAULT_TCK;
-	} else {
-		if (cfg->max_mem_clock_mhz >= 1066)
-			return TCK_1066MHZ;
-		else if (cfg->max_mem_clock_mhz >= 933)
-			return TCK_933MHZ;
-		else if (cfg->max_mem_clock_mhz >= 800)
-			return TCK_800MHZ;
-		else if (cfg->max_mem_clock_mhz >= 666)
-			return TCK_666MHZ;
-		else if (cfg->max_mem_clock_mhz >= 533)
-			return TCK_533MHZ;
-		else
-			return TCK_400MHZ;
-	}
-}
-
 #define DEFAULT_PCI_MMIO_SIZE 2048
 
 static unsigned int get_mmio_size(void)