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Diffstat (limited to 'src/northbridge/intel/sandybridge/raminit.c')
-rw-r--r--src/northbridge/intel/sandybridge/raminit.c50
1 files changed, 0 insertions, 50 deletions
diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c
index ca78eb3a64..34fb499599 100644
--- a/src/northbridge/intel/sandybridge/raminit.c
+++ b/src/northbridge/intel/sandybridge/raminit.c
@@ -38,13 +38,6 @@
/* FIXME: no ECC support */
/* FIXME: no support for 3-channel chipsets */
-static const char *ecc_decoder[] = {
- "inactive",
- "active on IO",
- "disabled on IO",
- "active",
-};
-
static void wait_txt_clear(void)
{
struct cpuid_result cp = cpuid_ext(1, 0);
@@ -90,49 +83,6 @@ static void fill_smbios17(ramctr_timing *ctrl)
}
}
-#define ON_OFF(val) (((val) & 1) ? "on" : "off")
-
-/* Print the memory controller configuration as read from the memory controller registers. */
-static void report_memory_config(void)
-{
- u32 addr_decoder_common, addr_decode_ch[NUM_CHANNELS];
- int i;
-
- addr_decoder_common = MCHBAR32(MAD_CHNL);
- addr_decode_ch[0] = MCHBAR32(MAD_DIMM_CH0);
- addr_decode_ch[1] = MCHBAR32(MAD_DIMM_CH1);
-
- const int refclk = MCHBAR32(MC_BIOS_REQ) & 0x100 ? 100 : 133;
-
- printk(BIOS_DEBUG, "memcfg DDR3 ref clock %d MHz\n", refclk);
- printk(BIOS_DEBUG, "memcfg DDR3 clock %d MHz\n",
- (MCHBAR32(MC_BIOS_DATA) * refclk * 100 * 2 + 50) / 100);
-
- printk(BIOS_DEBUG, "memcfg channel assignment: A: %d, B % d, C % d\n",
- (addr_decoder_common >> 0) & 3,
- (addr_decoder_common >> 2) & 3,
- (addr_decoder_common >> 4) & 3);
-
- for (i = 0; i < ARRAY_SIZE(addr_decode_ch); i++) {
- u32 ch_conf = addr_decode_ch[i];
- printk(BIOS_DEBUG, "memcfg channel[%d] config (%8.8x):\n", i, ch_conf);
- printk(BIOS_DEBUG, " ECC %s\n", ecc_decoder[(ch_conf >> 24) & 3]);
- printk(BIOS_DEBUG, " enhanced interleave mode %s\n", ON_OFF(ch_conf >> 22));
- printk(BIOS_DEBUG, " rank interleave %s\n", ON_OFF(ch_conf >> 21));
- printk(BIOS_DEBUG, " DIMMA %d MB width x%d %s rank%s\n",
- ((ch_conf >> 0) & 0xff) * 256,
- ((ch_conf >> 19) & 1) ? 16 : 8,
- ((ch_conf >> 17) & 1) ? "dual" : "single",
- ((ch_conf >> 16) & 1) ? "" : ", selected");
- printk(BIOS_DEBUG, " DIMMB %d MB width x%d %s rank%s\n",
- ((ch_conf >> 8) & 0xff) * 256,
- ((ch_conf >> 20) & 1) ? 16 : 8,
- ((ch_conf >> 18) & 1) ? "dual" : "single",
- ((ch_conf >> 16) & 1) ? ", selected" : "");
- }
-}
-#undef ON_OFF
-
/* Return CRC16 match for all SPDs */
static int verify_crc16_spds_ddr3(spd_raw_data *spd, ramctr_timing *ctrl)
{