aboutsummaryrefslogtreecommitdiff
path: root/src/northbridge/intel/sandybridge/raminit.c
diff options
context:
space:
mode:
Diffstat (limited to 'src/northbridge/intel/sandybridge/raminit.c')
-rw-r--r--src/northbridge/intel/sandybridge/raminit.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c
index 1e46263f93..46dc7c7843 100644
--- a/src/northbridge/intel/sandybridge/raminit.c
+++ b/src/northbridge/intel/sandybridge/raminit.c
@@ -225,7 +225,7 @@ static void wait_txt_clear(void)
if (!(read32((void *)0xfed30010) & 1))
return;
/* Wait for TXT clear. */
- while (!(read8((void *)0xfed40000) & (1 << 7))) ;
+ while (!(read8((void *)0xfed40000) & (1 << 7)));
}
static void sfence(void)
@@ -1322,7 +1322,7 @@ static void dram_jedecreset(ramctr_timing * ctrl)
u32 reg, addr;
int channel;
- while (!(MCHBAR32(0x5084) & 0x10000)) ;
+ while (!(MCHBAR32(0x5084) & 0x10000));
do {
reg = MCHBAR32(0x428c);
} while ((reg & 0x14) == 0);
@@ -3997,7 +3997,7 @@ static void restore_timings(ramctr_timing * ctrl)
u32 reg, addr;
- while (!(MCHBAR32(0x5084) & 0x10000)) ;
+ while (!(MCHBAR32(0x5084) & 0x10000));
do {
reg = MCHBAR32(0x428c);
} while ((reg & 0x14) == 0);