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Diffstat (limited to 'src/northbridge/intel/sandybridge/northbridge.c')
-rw-r--r--src/northbridge/intel/sandybridge/northbridge.c19
1 files changed, 18 insertions, 1 deletions
diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c
index 5c5f41ad4a..635e321c77 100644
--- a/src/northbridge/intel/sandybridge/northbridge.c
+++ b/src/northbridge/intel/sandybridge/northbridge.c
@@ -242,6 +242,22 @@ static void pci_domain_set_resources(device_t dev)
assign_resources(dev->link_list);
}
+static const char *northbridge_acpi_name(struct device *dev)
+{
+ if (dev->path.type == DEVICE_PATH_DOMAIN)
+ return "PCI0";
+
+ if (dev->path.type != DEVICE_PATH_PCI)
+ return NULL;
+
+ switch (dev->path.pci.devfn) {
+ case PCI_DEVFN(0, 0):
+ return "MCHC";
+ }
+
+ return NULL;
+}
+
/* TODO We could determine how many PCIe busses we need in
* the bar. For now that number is hardcoded to a max of 64.
* See e7525/northbridge.c for an example.
@@ -252,8 +268,9 @@ static struct device_operations pci_domain_ops = {
.enable_resources = NULL,
.init = NULL,
.scan_bus = pci_domain_scan_bus,
- .ops_pci_bus = pci_bus_default_ops,
+ .ops_pci_bus = pci_bus_default_ops,
.write_acpi_tables = northbridge_write_acpi_tables,
+ .acpi_name = northbridge_acpi_name,
};
static void mc_read_resources(device_t dev)