aboutsummaryrefslogtreecommitdiff
path: root/src/northbridge/intel/sandybridge/northbridge.c
diff options
context:
space:
mode:
Diffstat (limited to 'src/northbridge/intel/sandybridge/northbridge.c')
-rw-r--r--src/northbridge/intel/sandybridge/northbridge.c5
1 files changed, 0 insertions, 5 deletions
diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c
index b8022b8cea..0a413b4c7b 100644
--- a/src/northbridge/intel/sandybridge/northbridge.c
+++ b/src/northbridge/intel/sandybridge/northbridge.c
@@ -60,11 +60,6 @@ int bridge_silicon_revision(void)
static const int legacy_hole_base_k = 0xa0000 / 1024;
static const int legacy_hole_size_k = 384;
-void cbmem_post_handling(void)
-{
- update_mrc_cache();
-}
-
static int get_pcie_bar(u32 *base, u32 *len)
{
device_t dev;