diff options
Diffstat (limited to 'src/northbridge/intel/sandybridge/northbridge.c')
| -rw-r--r-- | src/northbridge/intel/sandybridge/northbridge.c | 44 |
1 files changed, 1 insertions, 43 deletions
diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c index dc1be32ee1..22743553d9 100644 --- a/src/northbridge/intel/sandybridge/northbridge.c +++ b/src/northbridge/intel/sandybridge/northbridge.c @@ -35,39 +35,6 @@ bool is_sandybridge(void) static const int legacy_hole_base_k = 0xa0000 / 1024; static const int legacy_hole_size_k = 384; -int decode_pcie_bar(u32 *const base, u32 *const len) -{ - *base = 0; - *len = 0; - - struct device *dev = pcidev_on_root(0, 0); - if (!dev) - return 0; - - const u32 pciexbar_reg = pci_read_config32(dev, PCIEXBAR); - - /* MMCFG not supported or not enabled */ - if (!(pciexbar_reg & (1 << 0))) - return 0; - - switch ((pciexbar_reg >> 1) & 3) { - case 0: /* 256MB */ - *base = pciexbar_reg & (0x0f << 28); - *len = 256 * MiB; - return 1; - case 1: /* 128M */ - *base = pciexbar_reg & (0x1f << 27); - *len = 128 * MiB; - return 1; - case 2: /* 64M */ - *base = pciexbar_reg & (0x3f << 26); - *len = 64 * MiB; - return 1; - } - - return 0; -} - static const char *northbridge_acpi_name(const struct device *dev) { if (dev->path.type == DEVICE_PATH_DOMAIN) @@ -84,10 +51,6 @@ static const char *northbridge_acpi_name(const struct device *dev) return NULL; } -/* - * TODO We could determine how many PCIe busses we need in the bar. - * For now, that number is hardcoded to a max of 64. - */ static struct device_operations pci_domain_ops = { .read_resources = pci_domain_read_resources, .set_resources = pci_domain_set_resources, @@ -126,7 +89,6 @@ static void add_fixed_resources(struct device *dev, int index) static void mc_read_resources(struct device *dev) { - u32 pcie_config_base, pcie_config_len; uint64_t tom, me_base, touud; uint32_t tseg_base, uma_size, tolud; uint16_t ggc; @@ -135,11 +97,7 @@ static void mc_read_resources(struct device *dev) pci_dev_read_resources(dev); - if (decode_pcie_bar(&pcie_config_base, &pcie_config_len)) { - const int buses = pcie_config_len / MiB; - struct resource *resource = new_resource(dev, PCIEXBAR); - mmconf_resource_init(resource, pcie_config_base, buses); - } + mmconf_resource(dev, PCIEXBAR); /* Total Memory 2GB example: * |