diff options
Diffstat (limited to 'src/northbridge/intel/sandybridge/memmap.c')
| -rw-r--r-- | src/northbridge/intel/sandybridge/memmap.c | 15 |
1 files changed, 6 insertions, 9 deletions
diff --git a/src/northbridge/intel/sandybridge/memmap.c b/src/northbridge/intel/sandybridge/memmap.c index fa29b3782b..95bf4584ed 100644 --- a/src/northbridge/intel/sandybridge/memmap.c +++ b/src/northbridge/intel/sandybridge/memmap.c @@ -21,8 +21,8 @@ #include <console/console.h> #include <cpu/intel/smm_reloc.h> #include <cpu/x86/mtrr.h> +#include <cpu/x86/smm.h> #include <program_loading.h> -#include <stage_cache.h> #include "sandybridge.h" static uintptr_t smm_region_start(void) @@ -37,23 +37,20 @@ void *cbmem_top(void) return (void *) smm_region_start(); } -u32 northbridge_get_tseg_base(void) +static uintptr_t northbridge_get_tseg_base(void) { return ALIGN_DOWN(smm_region_start(), 1*MiB); } -u32 northbridge_get_tseg_size(void) +static size_t northbridge_get_tseg_size(void) { return CONFIG_SMM_TSEG_SIZE; } -void stage_cache_external_region(void **base, size_t *size) +void smm_region(uintptr_t *start, size_t *size) { - /* The stage cache lives at the end of TSEG region. - * The top of RAM is defined to be the TSEG base address. */ - *size = CONFIG_SMM_RESERVED_SIZE; - *base = (void *)((uintptr_t)northbridge_get_tseg_base() + northbridge_get_tseg_size() - - CONFIG_IED_REGION_SIZE - CONFIG_SMM_RESERVED_SIZE); + *start = northbridge_get_tseg_base(); + *size = northbridge_get_tseg_size(); } void fill_postcar_frame(struct postcar_frame *pcf) |