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-rw-r--r--src/northbridge/intel/pineview/romstage.c3
1 files changed, 0 insertions, 3 deletions
diff --git a/src/northbridge/intel/pineview/romstage.c b/src/northbridge/intel/pineview/romstage.c
index cf1da63f85..e6a344e738 100644
--- a/src/northbridge/intel/pineview/romstage.c
+++ b/src/northbridge/intel/pineview/romstage.c
@@ -18,7 +18,6 @@
*/
#include <arch/io.h>
-#include <lib.h>
#include <timestamp.h>
#include <console/console.h>
#include <device/pci_ops.h>
@@ -105,8 +104,6 @@ void mainboard_romstage_entry(unsigned long bist)
post_code(0x31);
- quick_ram_check();
-
mb_pirq_setup();
rcba_config();