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Diffstat (limited to 'src/northbridge/intel/pineview/memmap.c')
| -rw-r--r-- | src/northbridge/intel/pineview/memmap.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/northbridge/intel/pineview/memmap.c b/src/northbridge/intel/pineview/memmap.c index 146fff2136..bebe3a5b69 100644 --- a/src/northbridge/intel/pineview/memmap.c +++ b/src/northbridge/intel/pineview/memmap.c @@ -106,7 +106,6 @@ static uintptr_t northbridge_get_tseg_base(void) return pci_read_config32(HOST_BRIDGE, TSEG); } - /* * Depending of UMA and TSEG configuration, TSEG might start at any 1 MiB alignment. * As this may cause very greedy MTRR setup, push CBMEM top downwards to 4 MiB boundary. |