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path: root/src/northbridge/intel/nehalem/early_init.c
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Diffstat (limited to 'src/northbridge/intel/nehalem/early_init.c')
-rw-r--r--src/northbridge/intel/nehalem/early_init.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/northbridge/intel/nehalem/early_init.c b/src/northbridge/intel/nehalem/early_init.c
index 0a9b408dcc..1ebb2a5ff3 100644
--- a/src/northbridge/intel/nehalem/early_init.c
+++ b/src/northbridge/intel/nehalem/early_init.c
@@ -110,11 +110,11 @@ static void early_cpu_init (void)
m.lo = (m.lo & ~0xff) | reg8;
wrmsr(IA32_PERF_CTL, m);
- m = rdmsr(MSR_IA32_MISC_ENABLES);
+ m = rdmsr(IA32_MISC_ENABLE);
m.hi &= ~0x00000040;
m.lo |= 0x10000;
- wrmsr(MSR_IA32_MISC_ENABLES, m);
+ wrmsr(IA32_MISC_ENABLE, m);
}
m = rdmsr(MSR_FSB_CLOCK_VCC);
@@ -124,9 +124,9 @@ static void early_cpu_init (void)
m.lo = (m.lo & ~0xff) | reg8;
wrmsr(IA32_PERF_CTL, m);
- m = rdmsr(MSR_IA32_MISC_ENABLES);
+ m = rdmsr(IA32_MISC_ENABLE);
m.lo |= 0x10000;
- wrmsr(MSR_IA32_MISC_ENABLES, m);
+ wrmsr(IA32_MISC_ENABLE, m);
}
void nehalem_early_initialization(int chipset_type)