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-rw-r--r--src/northbridge/intel/ironlake/bootblock.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/ironlake/bootblock.c b/src/northbridge/intel/ironlake/bootblock.c
index 6610a3e38c..241eb43021 100644
--- a/src/northbridge/intel/ironlake/bootblock.c
+++ b/src/northbridge/intel/ironlake/bootblock.c
@@ -22,7 +22,7 @@ void bootblock_early_northbridge_init(void)
{
/*
* The QuickPath bus number is the topmost bus number, as per the value
- * of the SAD_PCIEXBAR register. The register defaults to 256 busses on
+ * of the SAD_PCIEXBAR register. The register defaults to 256 buses on
* reset. Thus, hardcode the bus number when first setting up PCIEXBAR.
*/
const pci_devfn_t qpi_sad = PCI_DEV(255, 0, 1);