diff options
Diffstat (limited to 'src/northbridge/intel/i945/i945.h')
| -rw-r--r-- | src/northbridge/intel/i945/i945.h | 18 |
1 files changed, 11 insertions, 7 deletions
diff --git a/src/northbridge/intel/i945/i945.h b/src/northbridge/intel/i945/i945.h index a1f7185bde..a23e3a8f82 100644 --- a/src/northbridge/intel/i945/i945.h +++ b/src/northbridge/intel/i945/i945.h @@ -20,8 +20,18 @@ #ifndef __NORTHBRIDGE_INTEL_I945_I945_H__ #define __NORTHBRIDGE_INTEL_I945_I945_H__ 1 +/* Northbridge BARs */ +#define DEFAULT_PCIEXBAR CONFIG_MMCONF_BASE_ADDRESS /* 4 KB per PCIe device */ +#define DEFAULT_X60BAR 0xfed13000 +#define DEFAULT_MCHBAR 0xfed14000 /* 16 KB */ +#define DEFAULT_DMIBAR 0xfed18000 /* 4 KB */ +#define DEFAULT_EPBAR 0xfed19000 /* 4 KB */ + #include "../../../southbridge/intel/i82801gx/i82801gx.h" +/* Everything below this line is ignored in the DSDT */ +#ifndef __ACPI__ + /* Device 0:0.0 PCI configuration space (Host Bridge) */ #define EPBAR 0x40 @@ -30,13 +40,6 @@ #define DMIBAR 0x4c #define X60BAR 0x60 -/* Northbridge BARs */ -#define DEFAULT_PCIEXBAR 0xf0000000 /* 4 KB per PCIe device */ -#define DEFAULT_X60BAR 0xfed13000 -#define DEFAULT_MCHBAR 0xfed14000 /* 16 KB */ -#define DEFAULT_DMIBAR 0xfed18000 /* 4 KB */ -#define DEFAULT_EPBAR 0xfed19000 /* 4 KB */ - #define GGC 0x52 /* GMCH Graphics Control */ #define DEVEN 0x54 /* Device Enable */ @@ -329,3 +332,4 @@ #define DMIDRCCFG 0xeb4 /* 32bit */ #endif +#endif |