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-rw-r--r--src/northbridge/intel/i82810/Config.lb5
-rw-r--r--src/northbridge/intel/i82810/northbridge.c11
2 files changed, 16 insertions, 0 deletions
diff --git a/src/northbridge/intel/i82810/Config.lb b/src/northbridge/intel/i82810/Config.lb
index e8d57b2fb8..04375d89c1 100644
--- a/src/northbridge/intel/i82810/Config.lb
+++ b/src/northbridge/intel/i82810/Config.lb
@@ -18,5 +18,10 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
+uses HAVE_HIGH_TABLES
+
config chip.h
+
driver northbridge.o
+
+default HAVE_HIGH_TABLES=1
diff --git a/src/northbridge/intel/i82810/northbridge.c b/src/northbridge/intel/i82810/northbridge.c
index eb8a657982..bfbd338069 100644
--- a/src/northbridge/intel/i82810/northbridge.c
+++ b/src/northbridge/intel/i82810/northbridge.c
@@ -122,6 +122,11 @@ static int translate_i82810_to_mb[] = {
/* MB */0, 8, 0, 16, 16, 24, 32, 32, 48, 64, 64, 96, 128, 128, 192, 256,
};
+#if HAVE_HIGH_TABLES==1
+#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
+extern uint64_t high_tables_base, high_tables_size;
+#endif
+
static void pci_domain_set_resources(device_t dev)
{
device_t mc_dev;
@@ -166,6 +171,12 @@ static void pci_domain_set_resources(device_t dev)
idx = 10;
ram_resource(dev, idx++, 0, 640);
ram_resource(dev, idx++, 1024, tolmk - 1024);
+
+#if HAVE_HIGH_TABLES==1
+ /* Leave some space for ACPI, PIRQ and MP tables */
+ high_tables_base = (tomk - HIGH_TABLES_SIZE) * 1024;
+ high_tables_size = HIGH_TABLES_SIZE * 1024;
+#endif
}
assign_resources(&dev->link[0]);
}