diff options
Diffstat (limited to 'src/northbridge/intel/haswell')
| -rw-r--r-- | src/northbridge/intel/haswell/Kconfig | 3 | ||||
| -rw-r--r-- | src/northbridge/intel/haswell/northbridge.c | 4 |
2 files changed, 3 insertions, 4 deletions
diff --git a/src/northbridge/intel/haswell/Kconfig b/src/northbridge/intel/haswell/Kconfig index e3f9aec266..5b9284220b 100644 --- a/src/northbridge/intel/haswell/Kconfig +++ b/src/northbridge/intel/haswell/Kconfig @@ -25,6 +25,9 @@ config HASWELL_VBOOT_IN_BOOTBLOCK binary is used meaning a jump is made from RW to the RO region and back to the RW region after the binary is done. +config CHROMEOS + select CHROMEOS_RAMOOPS_DYNAMIC + config VBOOT select VBOOT_MUST_REQUEST_DISPLAY select VBOOT_STARTS_IN_ROMSTAGE if !HASWELL_VBOOT_IN_BOOTBLOCK diff --git a/src/northbridge/intel/haswell/northbridge.c b/src/northbridge/intel/haswell/northbridge.c index c00c801ee1..501caf17f1 100644 --- a/src/northbridge/intel/haswell/northbridge.c +++ b/src/northbridge/intel/haswell/northbridge.c @@ -14,7 +14,6 @@ #include <boot/tables.h> #include <security/intel/txt/txt_register.h> #include <southbridge/intel/lynxpoint/pch.h> -#include <vendorcode/google/chromeos/chromeos.h> #include "chip.h" #include "haswell.h" @@ -336,9 +335,6 @@ static void mc_add_dram_resources(struct device *dev, int *resource_cnt) mmio_resource(dev, index++, (0xa0000 >> 10), (0xc0000 - 0xa0000) >> 10); reserved_ram_resource(dev, index++, (0xc0000 >> 10), (0x100000 - 0xc0000) >> 10); - if (CONFIG(CHROMEOS_RAMOOPS)) - chromeos_reserve_ram_oops(dev, index++); - *resource_cnt = index; } |