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Diffstat (limited to 'src/northbridge/intel/haswell/romstage.c')
-rw-r--r--src/northbridge/intel/haswell/romstage.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/haswell/romstage.c b/src/northbridge/intel/haswell/romstage.c
index 579eca791b..c3d9a1088a 100644
--- a/src/northbridge/intel/haswell/romstage.c
+++ b/src/northbridge/intel/haswell/romstage.c
@@ -19,7 +19,7 @@ void romstage_common(const struct romstage_params *params)
enable_lapic();
- wake_from_s3 = early_pch_init(params->gpio_map, params->rcba_config);
+ wake_from_s3 = early_pch_init(params->gpio_map);
/* Perform some early chipset initialization required
* before RAM initialization can work