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Diffstat (limited to 'src/northbridge/intel/haswell/northbridge.c')
| -rw-r--r-- | src/northbridge/intel/haswell/northbridge.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/src/northbridge/intel/haswell/northbridge.c b/src/northbridge/intel/haswell/northbridge.c index 53c2f366c2..b57b28e632 100644 --- a/src/northbridge/intel/haswell/northbridge.c +++ b/src/northbridge/intel/haswell/northbridge.c @@ -543,6 +543,16 @@ static void northbridge_init(struct device *dev) MCHBAR32(0x5500) = 0x00100001; } +void *cbmem_top(void) +{ + u32 reg; + + /* The top the reserve regions fall just below the TSEG region. */ + reg = pci_read_config32(dev_find_slot(0, PCI_DEVFN(0, 0)), TSEG); + + return (void *)(reg & ~((1 << 20) - 1)); +} + static void northbridge_enable(device_t dev) { #if CONFIG_HAVE_ACPI_RESUME |