diff options
Diffstat (limited to 'src/northbridge/intel/haswell/gma.c')
| -rw-r--r-- | src/northbridge/intel/haswell/gma.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c index dd06867d9c..e577fb52f7 100644 --- a/src/northbridge/intel/haswell/gma.c +++ b/src/northbridge/intel/haswell/gma.c @@ -1,7 +1,7 @@ /* * This file is part of the coreboot project. * - * Copyright (C) 2011 Chromium OS Authors + * Copyright 2012 Google Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -189,6 +189,7 @@ static void gma_pm_init_post_vbios(struct device *dev) static void gma_func0_init(struct device *dev) { + int lightup_ok = 0; u32 reg32; u32 graphics_base; //, graphics_size; /* IGD needs to be Bus Master */ @@ -205,14 +206,6 @@ static void gma_func0_init(struct device *dev) /* Init graphics power management */ gma_pm_init_pre_vbios(dev); - /* PCI Init, will run VBIOS */ -#if !CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT - printk(BIOS_SPEW, "Run the VBIOS init\n"); - pci_dev_init(dev); -#endif - - /* Post VBIOS init */ - gma_pm_init_post_vbios(dev); #if CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT printk(BIOS_SPEW, "NATIVE graphics, run native enable\n"); u32 iobase, mmiobase, physbase; @@ -221,8 +214,15 @@ static void gma_func0_init(struct device *dev) physbase = pci_read_config32(dev, 0x5c) & ~0xf; int i915lightup(u32 physbase, u32 iobase, u32 mmiobase, u32 gfx); - i915lightup(physbase, iobase, mmiobase, graphics_base); + lightup_ok = i915lightup(physbase, iobase, mmiobase, graphics_base); #endif + if (! lightup_ok) { + printk(BIOS_SPEW, "FUI did not run; using VBIOS\n"); + pci_dev_init(dev); + } + + /* Post VBIOS init */ + gma_pm_init_post_vbios(dev); } static void gma_set_subsystem(device_t dev, unsigned vendor, unsigned device) |