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Diffstat (limited to 'src/northbridge/intel/haswell/gma.c')
-rw-r--r--src/northbridge/intel/haswell/gma.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c
index 71d5ab61ec..7adcfdaa5c 100644
--- a/src/northbridge/intel/haswell/gma.c
+++ b/src/northbridge/intel/haswell/gma.c
@@ -257,24 +257,24 @@ static void gma_setup_panel(struct device *dev)
/* Setup Panel Power On Delays */
reg32 = gtt_read(PCH_PP_ON_DELAYS);
if (!reg32) {
- reg32 |= (conf->gpu_panel_power_up_delay & 0x1fff) << 16;
- reg32 |= (conf->gpu_panel_power_backlight_on_delay & 0x1fff);
+ reg32 |= ((conf->gpu_panel_power_up_delay_ms * 10) & 0x1fff) << 16;
+ reg32 |= (conf->gpu_panel_power_backlight_on_delay_ms * 10) & 0x1fff;
gtt_write(PCH_PP_ON_DELAYS, reg32);
}
/* Setup Panel Power Off Delays */
reg32 = gtt_read(PCH_PP_OFF_DELAYS);
if (!reg32) {
- reg32 = (conf->gpu_panel_power_down_delay & 0x1fff) << 16;
- reg32 |= (conf->gpu_panel_power_backlight_off_delay & 0x1fff);
+ reg32 = ((conf->gpu_panel_power_down_delay_ms * 10) & 0x1fff) << 16;
+ reg32 |= (conf->gpu_panel_power_backlight_off_delay_ms * 10) & 0x1fff;
gtt_write(PCH_PP_OFF_DELAYS, reg32);
}
/* Setup Panel Power Cycle Delay */
- if (conf->gpu_panel_power_cycle_delay) {
+ if (conf->gpu_panel_power_cycle_delay_ms) {
reg32 = gtt_read(PCH_PP_DIVISOR);
reg32 &= ~0x1f;
- reg32 |= conf->gpu_panel_power_cycle_delay & 0x1f;
+ reg32 |= (DIV_ROUND_UP(conf->gpu_panel_power_cycle_delay_ms, 100) + 1) & 0x1f;
gtt_write(PCH_PP_DIVISOR, reg32);
}