3 files changed, 11 insertions, 9 deletions
diff --git a/src/northbridge/intel/gm45/acpi.c b/src/northbridge/intel/gm45/acpi.c
index 467c6c195e..dc5937230f 100644
--- a/src/northbridge/intel/gm45/acpi.c
+++ b/src/northbridge/intel/gm45/acpi.c
@@ -68,9 +68,11 @@ unsigned long acpi_fill_mcfg(unsigned long current)
 
 static unsigned long acpi_fill_dmar(unsigned long current)
 {
-	int me_active = (dev_find_slot(0, PCI_DEVFN(3, 0)) != NULL) &&
-		(pci_read_config8(dev_find_slot(0, PCI_DEVFN(3, 0)), PCI_CLASS_REVISION) != 0xff);
-	int stepping = pci_read_config8(dev_find_slot(0, PCI_DEVFN(0, 0)), PCI_CLASS_REVISION);
+	int me_active = (pcidev_on_root(3, 0) != NULL) &&
+		(pci_read_config8(pcidev_on_root(3, 0), PCI_CLASS_REVISION) !=
+									 0xff);
+	int stepping = pci_read_config8(pcidev_on_root(0, 0),
+							   PCI_CLASS_REVISION);
 
 	unsigned long tmp = current;
 	current += acpi_create_dmar_drhd(current, 0, 0, IOMMU_BASE1);
diff --git a/src/northbridge/intel/gm45/gma.c b/src/northbridge/intel/gm45/gma.c
index 8acec29370..0ec0516ceb 100644
--- a/src/northbridge/intel/gm45/gma.c
+++ b/src/northbridge/intel/gm45/gma.c
@@ -815,7 +815,7 @@ static void gma_set_subsystem(struct device *dev, unsigned int vendor,
 const struct i915_gpu_controller_info *
 intel_gma_get_controller_info(void)
 {
-	struct device *dev = dev_find_slot(0, PCI_DEVFN(0x2,0));
+	struct device *dev = pcidev_on_root(0x2, 0);
 	if (!dev) {
 		return NULL;
 	}
diff --git a/src/northbridge/intel/gm45/northbridge.c b/src/northbridge/intel/gm45/northbridge.c
index 014de26bbb..7ff046e9f3 100644
--- a/src/northbridge/intel/gm45/northbridge.c
+++ b/src/northbridge/intel/gm45/northbridge.c
@@ -41,7 +41,7 @@ static int decode_pcie_bar(u32 *const base, u32 *const len)
 	*base = 0;
 	*len = 0;
 
-	struct device *dev = dev_find_slot(0, PCI_DEVFN(0, 0));
+	struct device *dev = pcidev_on_root(0, 0);
 	if (!dev)
 		return 0;
 
@@ -95,7 +95,7 @@ static void mch_domain_read_resources(struct device *dev)
 
 	pci_domain_read_resources(dev);
 
-	struct device *mch = dev_find_slot(0, PCI_DEVFN(0, 0));
+	struct device *mch = pcidev_on_root(0, 0);
 
 	/* Top of Upper Usable DRAM, including remap */
 	touud = pci_read_config16(mch, D0F0_TOUUD);
@@ -196,7 +196,7 @@ static void mch_domain_init(struct device *dev)
 {
 	u32 reg32;
 
-	struct device *mch = dev_find_slot(0, PCI_DEVFN(0, 0));
+	struct device *mch = pcidev_on_root(0, 0);
 
 	/* Enable SERR */
 	reg32 = pci_read_config32(mch, PCI_COMMAND);
@@ -222,7 +222,7 @@ static const char *northbridge_acpi_name(const struct device *dev)
 
 void northbridge_write_smram(u8 smram)
 {
-	struct device *dev = dev_find_slot(0, PCI_DEVFN(0, 0));
+	struct device *dev = pcidev_on_root(0, 0);
 
 	if (dev == NULL)
 		die("could not find pci 00:00.0!\n");
@@ -309,7 +309,7 @@ static void gm45_init(void *const chip_info)
 		}
 		for (; fn >= 0; --fn) {
 			const struct device *const d =
-				dev_find_slot(0, PCI_DEVFN(dev, fn));
+				pcidev_on_root(dev, fn);
 			if (!d || d->enabled) continue;
 			const u32 deven = pci_read_config32(d0f0, D0F0_DEVEN);
 			pci_write_config32(d0f0, D0F0_DEVEN,