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Diffstat (limited to 'src/northbridge/intel/gm45/northbridge.c')
-rw-r--r--src/northbridge/intel/gm45/northbridge.c38
1 files changed, 38 insertions, 0 deletions
diff --git a/src/northbridge/intel/gm45/northbridge.c b/src/northbridge/intel/gm45/northbridge.c
index 663a9ff579..da37e33145 100644
--- a/src/northbridge/intel/gm45/northbridge.c
+++ b/src/northbridge/intel/gm45/northbridge.c
@@ -25,6 +25,7 @@
#include <boot/tables.h>
#include <arch/acpi.h>
#include <cbmem.h>
+#include <cpu/intel/smm/gen1/smi.h>
#include "chip.h"
#include "gm45.h"
#include "arch/acpi.h"
@@ -207,6 +208,43 @@ static const char *northbridge_acpi_name(const struct device *dev)
return NULL;
}
+u32 northbridge_get_tseg_base(void)
+{
+ return (u32)smm_region_start();
+}
+
+u32 northbridge_get_tseg_size(void)
+{
+ const u8 esmramc = pci_read_config8(dev_find_slot(0, PCI_DEVFN(0, 0)),
+ D0F0_ESMRAMC);
+ return decode_tseg_size(esmramc) << 10;
+}
+
+void northbridge_write_smram(u8 smram)
+{
+ pci_write_config8(dev_find_slot(0, PCI_DEVFN(0, 0)), D0F0_SMRAM, smram);
+}
+
+/*
+ * Really doesn't belong here but will go away with parallel mp init,
+ * so let it be here for a while...
+ */
+int cpu_get_apic_id_map(int *apic_id_map)
+{
+ unsigned int i;
+
+ /* Logical processors (threads) per core */
+ const struct cpuid_result cpuid1 = cpuid(1);
+ /* Read number of cores. */
+ const char cores = (cpuid1.ebx >> 16) & 0xf;
+
+ /* TODO in parallel MP cpuid(1).ebx */
+ for (i = 0; i < cores; i++)
+ apic_id_map[i] = i;
+
+ return cores;
+}
+
static struct device_operations pci_domain_ops = {
.read_resources = mch_domain_read_resources,
.set_resources = mch_domain_set_resources,