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path: root/src/northbridge/intel/gm45/northbridge.c
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Diffstat (limited to 'src/northbridge/intel/gm45/northbridge.c')
-rw-r--r--src/northbridge/intel/gm45/northbridge.c18
1 files changed, 11 insertions, 7 deletions
diff --git a/src/northbridge/intel/gm45/northbridge.c b/src/northbridge/intel/gm45/northbridge.c
index da37e33145..e14f843f9f 100644
--- a/src/northbridge/intel/gm45/northbridge.c
+++ b/src/northbridge/intel/gm45/northbridge.c
@@ -96,16 +96,18 @@ static void mch_domain_read_resources(struct device *dev)
pci_domain_read_resources(dev);
+ struct device *mch = dev_find_slot(0, PCI_DEVFN(0, 0));
+
/* Top of Upper Usable DRAM, including remap */
- touud = pci_read_config16(dev, D0F0_TOUUD);
+ touud = pci_read_config16(mch, D0F0_TOUUD);
touud <<= 20;
/* Top of Lower Usable DRAM */
- tolud = pci_read_config16(dev, D0F0_TOLUD) & 0xfff0;
+ tolud = pci_read_config16(mch, D0F0_TOLUD) & 0xfff0;
tolud <<= 16;
/* Top of Memory - does not account for any UMA */
- tom = pci_read_config16(dev, D0F0_TOM) & 0x1ff;
+ tom = pci_read_config16(mch, D0F0_TOM) & 0x1ff;
tom <<= 27;
printk(BIOS_DEBUG, "TOUUD 0x%llx TOLUD 0x%08x TOM 0x%llx\n",
@@ -114,7 +116,7 @@ static void mch_domain_read_resources(struct device *dev)
tomk = tolud >> 10;
/* Graphics memory comes next */
- const u16 ggc = pci_read_config16(dev, D0F0_GGC);
+ const u16 ggc = pci_read_config16(mch, D0F0_GGC);
if (!(ggc & 2)) {
printk(BIOS_DEBUG, "IGD decoded, subtracting ");
@@ -130,7 +132,7 @@ static void mch_domain_read_resources(struct device *dev)
uma_sizek = gms_sizek + gsm_sizek;
}
- const u8 esmramc = pci_read_config8(dev, D0F0_ESMRAMC);
+ const u8 esmramc = pci_read_config8(mch, D0F0_ESMRAMC);
const u32 tseg_sizek = decode_tseg_size(esmramc);
printk(BIOS_DEBUG, " and %uM TSEG\n", tseg_sizek >> 10);
tomk -= tseg_sizek;
@@ -186,10 +188,12 @@ static void mch_domain_init(struct device *dev)
{
u32 reg32;
+ struct device *mch = dev_find_slot(0, PCI_DEVFN(0, 0));
+
/* Enable SERR */
- reg32 = pci_read_config32(dev, PCI_COMMAND);
+ reg32 = pci_read_config32(mch, PCI_COMMAND);
reg32 |= PCI_COMMAND_SERR;
- pci_write_config32(dev, PCI_COMMAND, reg32);
+ pci_write_config32(mch, PCI_COMMAND, reg32);
}
static const char *northbridge_acpi_name(const struct device *dev)