diff options
Diffstat (limited to 'src/northbridge/intel/gm45/gma.c')
| -rw-r--r-- | src/northbridge/intel/gm45/gma.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/src/northbridge/intel/gm45/gma.c b/src/northbridge/intel/gm45/gma.c index c060bb0be7..24046712b4 100644 --- a/src/northbridge/intel/gm45/gma.c +++ b/src/northbridge/intel/gm45/gma.c @@ -109,7 +109,7 @@ static void gma_init_lvds(const struct northbridge_intel_gm45_config *info, hfront_porch = mode->hso; vfront_porch = mode->vso; - if (IS_ENABLED(CONFIG_FRAMEBUFFER_KEEP_VESA_MODE)) { + if (IS_ENABLED(CONFIG_LINEAR_FRAMEBUFFER)) { vga_sr_write(1, 1); vga_sr_write(0x2, 0xf); vga_sr_write(0x3, 0x0); @@ -263,7 +263,7 @@ static void gma_init_lvds(const struct northbridge_intel_gm45_config *info, write32(mmio + PIPECONF(0), PIPECONF_DISABLE); write32(mmio + PF_WIN_POS(0), 0); - if (IS_ENABLED(CONFIG_FRAMEBUFFER_KEEP_VESA_MODE)) { + if (IS_ENABLED(CONFIG_LINEAR_FRAMEBUFFER)) { write32(mmio + PIPESRC(0), ((hactive - 1) << 16) | (vactive - 1)); write32(mmio + PF_CTL(0), 0); @@ -281,7 +281,7 @@ static void gma_init_lvds(const struct northbridge_intel_gm45_config *info, write32(mmio + PIPECONF(0), PIPECONF_BPP_6 | PIPECONF_DITHER_EN); write32(mmio + PIPECONF(0), PIPECONF_ENABLE | PIPECONF_BPP_6 | PIPECONF_DITHER_EN); - if (IS_ENABLED(CONFIG_FRAMEBUFFER_KEEP_VESA_MODE)) { + if (IS_ENABLED(CONFIG_LINEAR_FRAMEBUFFER)) { write32(mmio + VGACNTRL, VGA_DISP_DISABLE); write32(mmio + DSPCNTR(0), DISPLAY_PLANE_ENABLE | DISPPLANE_BGRX888); @@ -307,7 +307,7 @@ static void gma_init_lvds(const struct northbridge_intel_gm45_config *info, write32(mmio + DEIIR, 0xffffffff); write32(mmio + SDEIIR, 0xffffffff); - if (IS_ENABLED(CONFIG_FRAMEBUFFER_KEEP_VESA_MODE)) { + if (IS_ENABLED(CONFIG_LINEAR_FRAMEBUFFER)) { memset((void *) lfb, 0, edid->x_resolution * edid->y_resolution * 4); set_vbe_mode_info_valid(edid, lfb); @@ -390,7 +390,7 @@ static void gma_init_vga(const struct northbridge_intel_gm45_config *info, vfront_porch = mode->vso; target_frequency = mode->pixel_clock; - if (IS_ENABLED(CONFIG_FRAMEBUFFER_KEEP_VESA_MODE)) { + if (IS_ENABLED(CONFIG_LINEAR_FRAMEBUFFER)) { vga_sr_write(1, 1); vga_sr_write(0x2, 0xf); vga_sr_write(0x3, 0x0); @@ -520,7 +520,7 @@ static void gma_init_vga(const struct northbridge_intel_gm45_config *info, write32(mmio + PIPECONF(0), PIPECONF_DISABLE); write32(mmio + PF_WIN_POS(0), 0); - if (IS_ENABLED(CONFIG_FRAMEBUFFER_KEEP_VESA_MODE)) { + if (IS_ENABLED(CONFIG_LINEAR_FRAMEBUFFER)) { write32(mmio + PIPESRC(0), ((hactive - 1) << 16) | (vactive - 1)); write32(mmio + PF_CTL(0), 0); @@ -539,7 +539,7 @@ static void gma_init_vga(const struct northbridge_intel_gm45_config *info, write32(mmio + PIPECONF(0), PIPECONF_ENABLE | PIPECONF_BPP_6 | PIPECONF_DITHER_EN); - if (IS_ENABLED(CONFIG_FRAMEBUFFER_KEEP_VESA_MODE)) { + if (IS_ENABLED(CONFIG_LINEAR_FRAMEBUFFER)) { write32(mmio + VGACNTRL, VGA_DISP_DISABLE); write32(mmio + DSPCNTR(0), DISPLAY_PLANE_ENABLE | DISPPLANE_BGRX888); @@ -569,7 +569,7 @@ static void gma_init_vga(const struct northbridge_intel_gm45_config *info, write32(mmio + DEIIR, 0xffffffff); write32(mmio + SDEIIR, 0xffffffff); - if (IS_ENABLED(CONFIG_FRAMEBUFFER_KEEP_VESA_MODE)) { + if (IS_ENABLED(CONFIG_LINEAR_FRAMEBUFFER)) { memset((void *) lfb, 0, edid->x_resolution * edid->y_resolution * 4); set_vbe_mode_info_valid(edid, lfb); |