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-rw-r--r--src/northbridge/intel/e7505/e7505.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/northbridge/intel/e7505/e7505.h b/src/northbridge/intel/e7505/e7505.h
index 525dce8c79..9c9171d2bd 100644
--- a/src/northbridge/intel/e7505/e7505.h
+++ b/src/northbridge/intel/e7505/e7505.h
@@ -18,6 +18,9 @@
* e7505.h: PCI configuration space for the Intel E7501 memory controller
*/
+#ifndef NORTHBRIDGE_INTEL_E7505_E7505_H
+#define NORTHBRIDGE_INTEL_E7505_E7505_H
+
/************ D0:F0 ************/
// Register offsets
#define SMRBASE 0x14 /* System Memory RCOMP Base Address Register, 32 bit? */
@@ -78,3 +81,5 @@
#define NERR_GLOBAL 0x44 /* Next global error register, 32 bits */
#define DRAM_FERR 0x80 /* DRAM first error register, 8 bits */
#define DRAM_NERR 0x82 /* DRAM next error register, 8 bits */
+
+#endif /* NORTHBRIDGE_INTEL_E7505_E7505_H */