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Diffstat (limited to 'src/northbridge/intel/e7505/e7505.h')
-rw-r--r--src/northbridge/intel/e7505/e7505.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/northbridge/intel/e7505/e7505.h b/src/northbridge/intel/e7505/e7505.h
index 9c9171d2bd..5ceeacceaf 100644
--- a/src/northbridge/intel/e7505/e7505.h
+++ b/src/northbridge/intel/e7505/e7505.h
@@ -42,6 +42,7 @@
#define DRC 0x7C /* DRAM Controller Mode register, 32 bit */
#define DRDCTL 0x80 /* DRAM Read Timing Control register, 16 bit? (if similar to 855PM) */
#define CKDIS 0x8C /* Clock disable register, 8 bit */
+#define APSIZE 0xB4
#define TOLM 0xC4 /* Top of Low Memory register, 16 bit */
#define REMAPBASE 0xC6 /* Remap Base Address register, 16 bit */
#define REMAPLIMIT 0xC8 /* Remap Limit Address register, 16 bit */
@@ -82,4 +83,8 @@
#define DRAM_FERR 0x80 /* DRAM first error register, 8 bits */
#define DRAM_NERR 0x82 /* DRAM next error register, 8 bits */
+/************ D1:F0 ************/
+
+#define APSIZE1 0x74
+
#endif /* NORTHBRIDGE_INTEL_E7505_E7505_H */