diff options
Diffstat (limited to 'src/northbridge/ibm/cpc710/cpc710_pci.h')
-rw-r--r-- | src/northbridge/ibm/cpc710/cpc710_pci.h | 38 |
1 files changed, 17 insertions, 21 deletions
diff --git a/src/northbridge/ibm/cpc710/cpc710_pci.h b/src/northbridge/ibm/cpc710/cpc710_pci.h index 24d0db6345..e2e12f21f3 100644 --- a/src/northbridge/ibm/cpc710/cpc710_pci.h +++ b/src/northbridge/ibm/cpc710/cpc710_pci.h @@ -24,28 +24,24 @@ #ifndef _CPC710_PCI_H_ #define _CPC710_PCI_H_ -#define PCI_MEMORY_PHYS 0x00000000 -#define PCI_MEMORY_BUS 0x80000000 -#define PCI_MEMORY_MAXSIZE 0x20000000 +#define CPC710_PCI_MEMORY_PHYS 0x00000000 +#define CPC710_PCI_MEMORY_BUS 0x80000000 +#define CPC710_PCI_MEMORY_MAXSIZE 0x20000000 -#define BRIDGE_CPCI_PHYS 0xff500000 -#define BRIDGE_CPCI_MEM_SIZE 0x08000000 -#define BRIDGE_CPCI_MEM_PHYS 0xf0000000 -#define BRIDGE_CPCI_MEM_BUS 0x00000000 -#define BRIDGE_CPCI_IO_SIZE 0x02000000 -#define BRIDGE_CPCI_IO_PHYS 0xfc000000 -#define BRIDGE_CPCI_IO_BUS 0x00000000 +#define CPC710_BRIDGE_CPCI_PHYS 0xff500000 +#define CPC710_BRIDGE_CPCI_MEM_SIZE 0x08000000 +#define CPC710_BRIDGE_CPCI_MEM_PHYS 0xf0000000 +#define CPC710_BRIDGE_CPCI_MEM_BUS 0x00000000 +#define CPC710_BRIDGE_CPCI_IO_SIZE 0x02000000 +#define CPC710_BRIDGE_CPCI_IO_PHY 0xfc000000 +#define CPC710_BRIDGE_CPCI_IO_BUS 0x00000000 -#define BRIDGE_LOCAL_PHYS 0xff400000 -#define BRIDGE_LOCAL_MEM_SIZE 0x04000000 -#define BRIDGE_LOCAL_MEM_PHYS 0xf8000000 -#define BRIDGE_LOCAL_MEM_BUS 0x40000000 -#define BRIDGE_LOCAL_IO_SIZE 0x01000000 -#define BRIDGE_LOCAL_IO_PHYS 0xfe000000 -#define BRIDGE_LOCAL_IO_BUS 0x04000000 - -#define BRIDGE(r, x) (BRIDGE_##r##_PHYS + HW_BRIDGE_##x) - -#define PCI_LATENCY_TIMER_VAL 0xff +#define CPC710_BRIDGE_LOCAL_PHYS 0xff400000 +#define CPC710_BRIDGE_LOCAL_MEM_SIZE 0x04000000 +#define CPC710_BRIDGE_LOCAL_MEM_PHYS 0xf8000000 +#define CPC710_BRIDGE_LOCAL_MEM_BUS 0x40000000 +#define CPC710_BRIDGE_LOCAL_IO_SIZE 0x01000000 +#define CPC710_BRIDGE_LOCAL_IO_PHYS 0xfe000000 +#define CPC710_BRIDGE_LOCAL_IO_BUS 0x04000000 #endif |