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-rw-r--r--src/northbridge/amd/amdfam10/amdfam10_util.c1
-rw-r--r--src/northbridge/amd/amdfam10/link_control.c7
-rw-r--r--src/northbridge/amd/amdfam10/misc_control.c29
-rw-r--r--src/northbridge/amd/amdfam10/nb_control.c10
-rw-r--r--src/northbridge/amd/amdfam10/northbridge.c10
-rw-r--r--src/northbridge/amd/amdfam10/raminit_amdmct.c3
-rw-r--r--src/northbridge/amd/amdht/ht_wrapper.c5
-rw-r--r--src/northbridge/amd/amdmct/amddefs.h1
-rw-r--r--src/northbridge/amd/amdmct/mct_ddr3/mct_d.c11
9 files changed, 67 insertions, 10 deletions
diff --git a/src/northbridge/amd/amdfam10/amdfam10_util.c b/src/northbridge/amd/amdfam10/amdfam10_util.c
index 0ef6c92b49..c9b30f8fb8 100644
--- a/src/northbridge/amd/amdfam10/amdfam10_util.c
+++ b/src/northbridge/amd/amdfam10/amdfam10_util.c
@@ -101,6 +101,7 @@ uint64_t mctGetLogicalCPUID(u32 Node)
ret = AMD_OR_B2;
break;
case 0x15020:
+ case 0x15101:
ret = AMD_OR_C0;
break;
default:
diff --git a/src/northbridge/amd/amdfam10/link_control.c b/src/northbridge/amd/amdfam10/link_control.c
index d0d894c655..468f184db2 100644
--- a/src/northbridge/amd/amdfam10/link_control.c
+++ b/src/northbridge/amd/amdfam10/link_control.c
@@ -2,6 +2,7 @@
* This file is part of the coreboot project.
*
* Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>, Raptor Engineering
+ * Copyright (C) 2016 Damien Zammit <damien@zamaudio.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -154,6 +155,12 @@ static const struct pci_driver mcf4_driver_fam10 __pci_driver = {
.device = 0x1204,
};
+static const struct pci_driver mcf4_driver_fam15_model10 __pci_driver = {
+ .ops = &mcf4_ops,
+ .vendor = PCI_VENDOR_ID_AMD,
+ .device = 0x1404,
+};
+
static const struct pci_driver mcf4_driver_fam15 __pci_driver = {
.ops = &mcf4_ops,
.vendor = PCI_VENDOR_ID_AMD,
diff --git a/src/northbridge/amd/amdfam10/misc_control.c b/src/northbridge/amd/amdfam10/misc_control.c
index 4c65bca79f..d6f9fd9437 100644
--- a/src/northbridge/amd/amdfam10/misc_control.c
+++ b/src/northbridge/amd/amdfam10/misc_control.c
@@ -5,6 +5,7 @@
* Copyright (C) Stefan Reinauer
* Copyright (C) 2007 Advanced Micro Devices, Inc.
* Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>, Raptor Engineering
+ * Copyright (C) 2016 Damien Zammit <damien@zamaudio.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -117,16 +118,25 @@ static void set_agp_aperture(device_t dev, uint32_t pci_id)
static void mcf3_set_resources_fam10h(device_t dev)
{
- /* Set the gart apeture */
+ /* Set the gart aperture */
set_agp_aperture(dev, 0x1203);
/* Set the generic PCI resources */
pci_dev_set_resources(dev);
}
+static void mcf3_set_resources_fam15h_model10(device_t dev)
+{
+ /* Set the gart aperture */
+ set_agp_aperture(dev, 0x1403);
+
+ /* Set the generic PCI resources */
+ pci_dev_set_resources(dev);
+}
+
static void mcf3_set_resources_fam15h(device_t dev)
{
- /* Set the gart apeture */
+ /* Set the gart aperture */
set_agp_aperture(dev, 0x1603);
/* Set the generic PCI resources */
@@ -175,6 +185,15 @@ static struct device_operations mcf3_ops_fam10h = {
.ops_pci = 0,
};
+static struct device_operations mcf3_ops_fam15h_model10 = {
+ .read_resources = mcf3_read_resources,
+ .set_resources = mcf3_set_resources_fam15h_model10,
+ .enable_resources = pci_dev_enable_resources,
+ .init = misc_control_init,
+ .scan_bus = 0,
+ .ops_pci = 0,
+};
+
static struct device_operations mcf3_ops_fam15h = {
.read_resources = mcf3_read_resources,
.set_resources = mcf3_set_resources_fam15h,
@@ -190,6 +209,12 @@ static const struct pci_driver mcf3_driver __pci_driver = {
.device = 0x1203,
};
+static const struct pci_driver mcf3_driver_fam15_model10 __pci_driver = {
+ .ops = &mcf3_ops_fam15h_model10,
+ .vendor = PCI_VENDOR_ID_AMD,
+ .device = 0x1403,
+};
+
static const struct pci_driver mcf3_driver_fam15 __pci_driver = {
.ops = &mcf3_ops_fam15h,
.vendor = PCI_VENDOR_ID_AMD,
diff --git a/src/northbridge/amd/amdfam10/nb_control.c b/src/northbridge/amd/amdfam10/nb_control.c
index 07f739d359..1884799ec4 100644
--- a/src/northbridge/amd/amdfam10/nb_control.c
+++ b/src/northbridge/amd/amdfam10/nb_control.c
@@ -2,6 +2,7 @@
* This file is part of the coreboot project.
*
* Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>, Raptor Engineering
+ * Copyright (C) 2016 Damien Zammit <damien@zamaudio.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -64,7 +65,6 @@ static void nb_control_init(struct device *dev)
printk(BIOS_DEBUG, "done.\n");
}
-
static struct device_operations mcf5_ops = {
.read_resources = pci_dev_read_resources,
.set_resources = pci_dev_set_resources,
@@ -74,8 +74,14 @@ static struct device_operations mcf5_ops = {
.ops_pci = 0,
};
+static const struct pci_driver mcf5_driver_fam15_model10 __pci_driver = {
+ .ops = &mcf5_ops,
+ .vendor = PCI_VENDOR_ID_AMD,
+ .device = 0x1405,
+};
+
static const struct pci_driver mcf5_driver_fam15 __pci_driver = {
.ops = &mcf5_ops,
.vendor = PCI_VENDOR_ID_AMD,
.device = 0x1605,
-}; \ No newline at end of file
+};
diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c
index 3b747bd5ec..06079dd98b 100644
--- a/src/northbridge/amd/amdfam10/northbridge.c
+++ b/src/northbridge/amd/amdfam10/northbridge.c
@@ -1,6 +1,7 @@
/*
* This file is part of the coreboot project.
*
+ * Copyright (C) 2016 Damien Zammit <damien@zamaudio.com>
* Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>, Raptor Engineering
* Copyright (C) 2007 Advanced Micro Devices, Inc.
*
@@ -673,26 +674,29 @@ static struct device_operations northbridge_operations = {
.ops_pci = 0,
};
-
static const struct pci_driver mcf0_driver __pci_driver = {
.ops = &northbridge_operations,
.vendor = PCI_VENDOR_ID_AMD,
.device = 0x1200,
};
-
static void amdfam10_nb_init(void *chip_info)
{
relocate_sb_ht_chain();
}
+static const struct pci_driver mcf0_driver_fam15_model10 __pci_driver = {
+ .ops = &northbridge_operations,
+ .vendor = PCI_VENDOR_ID_AMD,
+ .device = 0x1400,
+};
+
static const struct pci_driver mcf0_driver_fam15 __pci_driver = {
.ops = &northbridge_operations,
.vendor = PCI_VENDOR_ID_AMD,
.device = 0x1600,
};
-
struct chip_operations northbridge_amd_amdfam10_ops = {
CHIP_NAME("AMD Family 10h/15h Northbridge")
.enable_dev = 0,
diff --git a/src/northbridge/amd/amdfam10/raminit_amdmct.c b/src/northbridge/amd/amdfam10/raminit_amdmct.c
index 1407631e80..6166169812 100644
--- a/src/northbridge/amd/amdfam10/raminit_amdmct.c
+++ b/src/northbridge/amd/amdfam10/raminit_amdmct.c
@@ -579,6 +579,9 @@ static uint16_t mct_MaxLoadFreq(uint8_t count, uint8_t highest_rank_count, uint8
//G34
#elif CONFIG_CPU_SOCKET_TYPE == 0x15
#include "../amdmct/mct_ddr3/mctardk5.c"
+//FM2
+#elif CONFIG_CPU_SOCKET_TYPE == 0x16
+#include "../amdmct/mct_ddr3/mctardk5.c"
#endif
#else /* DDR2 */
diff --git a/src/northbridge/amd/amdht/ht_wrapper.c b/src/northbridge/amd/amdht/ht_wrapper.c
index 32cf175cdd..f31fcd228d 100644
--- a/src/northbridge/amd/amdht/ht_wrapper.c
+++ b/src/northbridge/amd/amdht/ht_wrapper.c
@@ -258,6 +258,11 @@ static BOOL AMD_CB_IgnoreLink (u8 node, u8 link)
static void amd_ht_init(struct sys_info *sysinfo)
{
+ if (!sysinfo) {
+ printk(BIOS_DEBUG, "Skipping amd_ht_init()\n");
+ return;
+ }
+
AMD_HTBLOCK ht_wrapper = {
NULL, // u8 **topolist;
0, // u8 AutoBusStart;
diff --git a/src/northbridge/amd/amdmct/amddefs.h b/src/northbridge/amd/amdmct/amddefs.h
index 10a50d9243..9193a04e69 100644
--- a/src/northbridge/amd/amdmct/amddefs.h
+++ b/src/northbridge/amd/amdmct/amddefs.h
@@ -162,3 +162,4 @@
#define AMD_PKGTYPE_G34 3
#define AMD_PKGTYPE_ASB2 4
#define AMD_PKGTYPE_C32 5
+#define AMD_PKGTYPE_FM2 6
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
index 4d9bc58c68..f7a0cbc773 100644
--- a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
+++ b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
@@ -6850,10 +6850,15 @@ static void mct_InitialMCT_D(struct MCTStatStruc *pMCTstat, struct DCTStatStruc
static u32 mct_NodePresent_D(void)
{
u32 val;
- if (is_fam15h())
- val = 0x16001022;
- else
+ if (is_fam15h()) {
+ if (is_model10_1f()) {
+ val = 0x14001022;
+ } else {
+ val = 0x16001022;
+ }
+ } else {
val = 0x12001022;
+ }
return val;
}
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-15 19:57:50 +0000