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-rw-r--r--src/northbridge/amd/agesa/family10/northbridge.c4
-rw-r--r--src/northbridge/amd/agesa/family12/northbridge.c4
-rw-r--r--src/northbridge/amd/agesa/family14/northbridge.c4
-rw-r--r--src/northbridge/amd/agesa/family15/northbridge.c4
-rw-r--r--src/northbridge/amd/agesa/family15tn/northbridge.c4
-rw-r--r--src/northbridge/amd/amdfam10/northbridge.c7
-rw-r--r--src/northbridge/amd/amdk8/northbridge.c6
-rw-r--r--src/northbridge/amd/gx1/northbridge.c4
-rw-r--r--src/northbridge/amd/gx2/northbridge.c4
-rw-r--r--src/northbridge/amd/lx/northbridge.c4
10 files changed, 1 insertions, 44 deletions
diff --git a/src/northbridge/amd/agesa/family10/northbridge.c b/src/northbridge/amd/agesa/family10/northbridge.c
index cd21d9c341..e0c3255456 100644
--- a/src/northbridge/amd/agesa/family10/northbridge.c
+++ b/src/northbridge/amd/agesa/family10/northbridge.c
@@ -1036,7 +1036,6 @@ static void amdfam10_domain_set_resources(device_t dev)
ram_resource(dev, (idx | i), basek, pre_sizek);
idx += 0x10;
sizek -= pre_sizek;
-#if CONFIG_WRITE_HIGH_TABLES
if (high_tables_base==0) {
/* Leave some space for ACPI, PIRQ and MP tables */
#if CONFIG_GFXUMA
@@ -1048,7 +1047,6 @@ static void amdfam10_domain_set_resources(device_t dev)
printk(BIOS_DEBUG, " split: %dK table at =%08llx\n",
(u32)(high_tables_size / 1024), high_tables_base);
}
-#endif
}
basek = mmio_basek;
}
@@ -1063,7 +1061,6 @@ static void amdfam10_domain_set_resources(device_t dev)
ram_resource(dev, (idx | i), basek, sizek);
idx += 0x10;
-#if CONFIG_WRITE_HIGH_TABLES
printk(BIOS_DEBUG, "node %d: mmio_basek=%08lx, basek=%08llx, limitk=%08llx\n",
i, mmio_basek, basek, limitk);
if (high_tables_base==0) {
@@ -1075,7 +1072,6 @@ static void amdfam10_domain_set_resources(device_t dev)
#endif
high_tables_size = HIGH_MEMORY_SIZE;
}
-#endif
}
#if CONFIG_GFXUMA
diff --git a/src/northbridge/amd/agesa/family12/northbridge.c b/src/northbridge/amd/agesa/family12/northbridge.c
index 1467fdcfd2..2ef556324a 100644
--- a/src/northbridge/amd/agesa/family12/northbridge.c
+++ b/src/northbridge/amd/agesa/family12/northbridge.c
@@ -722,7 +722,6 @@ printk(BIOS_DEBUG, "adsr - 0xa0000 to 0xbffff resource.\n");
ram_resource(dev, idx, basek, pre_sizek);
idx += 0x10;
sizek -= pre_sizek;
-#if CONFIG_WRITE_HIGH_TABLES
if (high_tables_base==0) {
/* Leave some space for ACPI, PIRQ and MP tables */
#if CONFIG_GFXUMA
@@ -735,7 +734,6 @@ printk(BIOS_DEBUG, "adsr - 0xa0000 to 0xbffff resource.\n");
(u32)(high_tables_size / 1024),
high_tables_base);
}
-#endif
}
basek = mmio_basek;
@@ -751,7 +749,6 @@ printk(BIOS_DEBUG, "adsr - 0xa0000 to 0xbffff resource.\n");
ram_resource(dev, (idx | 0), basek, sizek);
idx += 0x10;
-#if CONFIG_WRITE_HIGH_TABLES
printk(BIOS_DEBUG, "%d: mmio_basek=%08lx, basek=%08llx, limitk=%08llx\n",
0, mmio_basek, basek, limitk);
if (high_tables_base==0) {
@@ -764,7 +761,6 @@ printk(BIOS_DEBUG, "adsr - 0xa0000 to 0xbffff resource.\n");
#endif
high_tables_size = HIGH_MEMORY_SIZE;
}
-#endif
}
printk(BIOS_DEBUG, " adsr - mmio_basek = %lx.\n", mmio_basek);
printk(BIOS_DEBUG, " adsr - high_tables_size = %llx.\n",
diff --git a/src/northbridge/amd/agesa/family14/northbridge.c b/src/northbridge/amd/agesa/family14/northbridge.c
index c1685ec00c..3d46ad7756 100644
--- a/src/northbridge/amd/agesa/family14/northbridge.c
+++ b/src/northbridge/amd/agesa/family14/northbridge.c
@@ -716,7 +716,6 @@ static void domain_set_resources(device_t dev)
pre_sizek);
idx += 0x10;
sizek -= pre_sizek;
-#if CONFIG_WRITE_HIGH_TABLES
if (high_tables_base == 0) {
/* Leave some space for ACPI, PIRQ and MP tables */
#if CONFIG_GFXUMA
@@ -728,7 +727,6 @@ static void domain_set_resources(device_t dev)
printk(BIOS_DEBUG, " split: %dK table at =%08llx\n",
(u32)(high_tables_size / 1024), high_tables_base);
}
-#endif
}
basek = mmio_basek;
@@ -743,7 +741,6 @@ static void domain_set_resources(device_t dev)
ram_resource(dev, (idx | 0), basek, sizek);
idx += 0x10;
-#if CONFIG_WRITE_HIGH_TABLES
printk(BIOS_DEBUG,
"%d: mmio_basek=%08lx, basek=%08llx, limitk=%08llx\n", 0,
mmio_basek, basek, limitk);
@@ -757,7 +754,6 @@ static void domain_set_resources(device_t dev)
#endif
high_tables_size = HIGH_MEMORY_SIZE;
}
-#endif
}
printk(BIOS_DEBUG, " adsr - mmio_basek = %lx.\n", mmio_basek);
printk(BIOS_DEBUG, " adsr - high_tables_size = %llx.\n",
diff --git a/src/northbridge/amd/agesa/family15/northbridge.c b/src/northbridge/amd/agesa/family15/northbridge.c
index 5cd76a33cc..36e1499fa3 100644
--- a/src/northbridge/amd/agesa/family15/northbridge.c
+++ b/src/northbridge/amd/agesa/family15/northbridge.c
@@ -807,7 +807,6 @@ static void domain_set_resources(device_t dev)
ram_resource(dev, (idx | i), basek, pre_sizek);
idx += 0x10;
sizek -= pre_sizek;
-#if CONFIG_WRITE_HIGH_TABLES
if (high_tables_base==0) {
/* Leave some space for ACPI, PIRQ and MP tables */
#if CONFIG_GFXUMA
@@ -819,7 +818,6 @@ static void domain_set_resources(device_t dev)
printk(BIOS_DEBUG, " split: %dK table at =%08llx\n",
(u32)(high_tables_size / 1024), high_tables_base);
}
-#endif
}
basek = mmio_basek;
}
@@ -834,7 +832,6 @@ static void domain_set_resources(device_t dev)
ram_resource(dev, (idx | i), basek, sizek);
idx += 0x10;
-#if CONFIG_WRITE_HIGH_TABLES
printk(BIOS_DEBUG, "node %d: mmio_basek=%08lx, basek=%08llx, limitk=%08llx\n",
i, mmio_basek, basek, limitk);
if (high_tables_base==0) {
@@ -846,7 +843,6 @@ static void domain_set_resources(device_t dev)
#endif
high_tables_size = HIGH_MEMORY_SIZE;
}
-#endif
}
#if CONFIG_GFXUMA
diff --git a/src/northbridge/amd/agesa/family15tn/northbridge.c b/src/northbridge/amd/agesa/family15tn/northbridge.c
index 144dde726f..90f8345a57 100644
--- a/src/northbridge/amd/agesa/family15tn/northbridge.c
+++ b/src/northbridge/amd/agesa/family15tn/northbridge.c
@@ -793,7 +793,6 @@ static void domain_set_resources(device_t dev)
ram_resource(dev, (idx | i), basek, pre_sizek);
idx += 0x10;
sizek -= pre_sizek;
-#if CONFIG_WRITE_HIGH_TABLES
if (high_tables_base==0) {
/* Leave some space for ACPI, PIRQ and MP tables */
#if CONFIG_GFXUMA
@@ -805,7 +804,6 @@ static void domain_set_resources(device_t dev)
printk(BIOS_DEBUG, " split: %dK table at =%08llx\n",
(u32)(high_tables_size / 1024), high_tables_base);
}
-#endif
}
basek = mmio_basek;
}
@@ -820,7 +818,6 @@ static void domain_set_resources(device_t dev)
ram_resource(dev, (idx | i), basek, sizek);
idx += 0x10;
-#if CONFIG_WRITE_HIGH_TABLES
printk(BIOS_DEBUG, "node %d: mmio_basek=%08lx, basek=%08llx, limitk=%08llx\n",
i, mmio_basek, basek, limitk);
if (high_tables_base==0) {
@@ -832,7 +829,6 @@ static void domain_set_resources(device_t dev)
#endif
high_tables_size = HIGH_MEMORY_SIZE;
}
-#endif
}
#if CONFIG_GFXUMA
diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c
index aabbae2e88..875f462ba4 100644
--- a/src/northbridge/amd/amdfam10/northbridge.c
+++ b/src/northbridge/amd/amdfam10/northbridge.c
@@ -842,9 +842,7 @@ static void disable_hoist_memory(unsigned long hole_startk, int node_id)
#endif
-#if CONFIG_WRITE_HIGH_TABLES
#include <cbmem.h>
-#endif
static void setup_uma_memory(void)
{
@@ -1039,7 +1037,7 @@ static void amdfam10_domain_set_resources(device_t dev)
ram_resource(dev, (idx | i), basek, pre_sizek);
idx += 0x10;
sizek -= pre_sizek;
-#if CONFIG_WRITE_HIGH_TABLES
+
if (high_tables_base==0) {
/* Leave some space for ACPI, PIRQ and MP tables */
#if CONFIG_GFXUMA
@@ -1051,7 +1049,6 @@ static void amdfam10_domain_set_resources(device_t dev)
printk(BIOS_DEBUG, " split: %dK table at =%08llx\n",
HIGH_MEMORY_SIZE / 1024, high_tables_base);
}
-#endif
}
#if !CONFIG_AMDMCT
#if CONFIG_HW_MEM_HOLE_SIZEK != 0
@@ -1077,7 +1074,6 @@ static void amdfam10_domain_set_resources(device_t dev)
ram_resource(dev, (idx | i), basek, sizek);
idx += 0x10;
-#if CONFIG_WRITE_HIGH_TABLES
printk(BIOS_DEBUG, "%d: mmio_basek=%08lx, basek=%08llx, limitk=%08llx\n",
i, mmio_basek, basek, limitk);
if (high_tables_base==0) {
@@ -1089,7 +1085,6 @@ static void amdfam10_domain_set_resources(device_t dev)
#endif
high_tables_size = HIGH_MEMORY_SIZE;
}
-#endif
}
#if CONFIG_GFXUMA
diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c
index 5ed7762047..5c1d97a1c6 100644
--- a/src/northbridge/amd/amdk8/northbridge.c
+++ b/src/northbridge/amd/amdk8/northbridge.c
@@ -817,9 +817,7 @@ static u32 hoist_memory(unsigned long hole_startk, int node_id)
}
#endif
-#if CONFIG_WRITE_HIGH_TABLES
#include <cbmem.h>
-#endif
static void setup_uma_memory(void)
{
@@ -1044,7 +1042,6 @@ static void amdk8_domain_set_resources(device_t dev)
ram_resource(dev, (idx | i), basek, pre_sizek);
idx += 0x10;
sizek -= pre_sizek;
-#if CONFIG_WRITE_HIGH_TABLES
if (high_tables_base==0) {
/* Leave some space for ACPI, PIRQ and MP tables */
#if CONFIG_GFXUMA
@@ -1056,7 +1053,6 @@ static void amdk8_domain_set_resources(device_t dev)
printk(BIOS_DEBUG, " split: %dK table at =%08llx\n",
HIGH_MEMORY_SIZE / 1024, high_tables_base);
}
-#endif
}
#if CONFIG_HW_MEM_HOLE_SIZEK != 0
if(reset_memhole)
@@ -1079,7 +1075,6 @@ static void amdk8_domain_set_resources(device_t dev)
ram_resource(dev, (idx | i), basek, sizek);
idx += 0x10;
-#if CONFIG_WRITE_HIGH_TABLES
printk(BIOS_DEBUG, "%d: mmio_basek=%08lx, basek=%08x, limitk=%08x\n",
i, mmio_basek, basek, limitk);
if (high_tables_base==0) {
@@ -1091,7 +1086,6 @@ static void amdk8_domain_set_resources(device_t dev)
#endif
high_tables_size = HIGH_MEMORY_SIZE;
}
-#endif
}
#if CONFIG_GFXUMA
diff --git a/src/northbridge/amd/gx1/northbridge.c b/src/northbridge/amd/gx1/northbridge.c
index e4832636bf..4547b8d243 100644
--- a/src/northbridge/amd/gx1/northbridge.c
+++ b/src/northbridge/amd/gx1/northbridge.c
@@ -64,9 +64,7 @@ static const struct pci_driver northbridge_driver __pci_driver = {
.device = PCI_DEVICE_ID_CYRIX_PCI_MASTER,
};
-#if CONFIG_WRITE_HIGH_TABLES
#include <cbmem.h>
-#endif
static void pci_domain_set_resources(device_t dev)
{
@@ -111,11 +109,9 @@ static void pci_domain_set_resources(device_t dev)
tolmk = tomk;
}
-#if CONFIG_WRITE_HIGH_TABLES
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tolmk * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
-#endif
/* Report the memory regions */
idx = 10;
diff --git a/src/northbridge/amd/gx2/northbridge.c b/src/northbridge/amd/gx2/northbridge.c
index 995237486b..62de416a88 100644
--- a/src/northbridge/amd/gx2/northbridge.c
+++ b/src/northbridge/amd/gx2/northbridge.c
@@ -271,9 +271,7 @@ static const struct pci_driver northbridge_driver __pci_driver = {
.device = PCI_DEVICE_ID_NS_GX2,
};
-#if CONFIG_WRITE_HIGH_TABLES
#include <cbmem.h>
-#endif
static void pci_domain_set_resources(device_t dev)
{
@@ -292,11 +290,9 @@ static void pci_domain_set_resources(device_t dev)
ram_resource(dev, idx++, 0, 640);
ram_resource(dev, idx++, 768, tomk - 768); /* Systop - 0xc0000 -> KB */
-#if CONFIG_WRITE_HIGH_TABLES
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tomk * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
-#endif
}
assign_resources(dev->link_list);
diff --git a/src/northbridge/amd/lx/northbridge.c b/src/northbridge/amd/lx/northbridge.c
index 3a2eb462ed..5909d1360e 100644
--- a/src/northbridge/amd/lx/northbridge.c
+++ b/src/northbridge/amd/lx/northbridge.c
@@ -370,9 +370,7 @@ static const struct pci_driver northbridge_driver __pci_driver = {
.device = PCI_DEVICE_ID_AMD_LXBRIDGE,
};
-#if CONFIG_WRITE_HIGH_TABLES
#include <cbmem.h>
-#endif
static void pci_domain_set_resources(device_t dev)
{
@@ -391,11 +389,9 @@ static void pci_domain_set_resources(device_t dev)
ram_resource(dev, idx++, 0, 640);
ram_resource(dev, idx++, 768, tomk - 768); // Systop - 0xc0000 -> KB
-#if CONFIG_WRITE_HIGH_TABLES
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tomk * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
-#endif
}
assign_resources(dev->link_list);
generated by cgit v1.2.3 (git 2.39.1) at 2024-07-18 00:12:26 +0000