diff options
Diffstat (limited to 'src/northbridge/amd')
-rw-r--r-- | src/northbridge/amd/amdfam10/resourcemap.c | 2 | ||||
-rw-r--r-- | src/northbridge/amd/amdk8/coherent_ht.c | 33 | ||||
-rw-r--r-- | src/northbridge/amd/amdk8/raminit.c | 5 | ||||
-rw-r--r-- | src/northbridge/amd/amdk8/raminit_f.c | 5 | ||||
-rw-r--r-- | src/northbridge/amd/amdk8/raminit_test.c | 3 | ||||
-rw-r--r-- | src/northbridge/amd/amdk8/resourcemap.c | 2 | ||||
-rw-r--r-- | src/northbridge/amd/gx2/chipsetinit.c | 2 |
7 files changed, 28 insertions, 24 deletions
diff --git a/src/northbridge/amd/amdfam10/resourcemap.c b/src/northbridge/amd/amdfam10/resourcemap.c index cb445a1260..49d546861c 100644 --- a/src/northbridge/amd/amdfam10/resourcemap.c +++ b/src/northbridge/amd/amdfam10/resourcemap.c @@ -281,7 +281,7 @@ static void setup_default_resource_map(void) }; u32 max; - max = sizeof(register_values)/sizeof(register_values[0]); + max = ARRAY_SIZE(register_values); setup_resource_map(register_values, max); } diff --git a/src/northbridge/amd/amdk8/coherent_ht.c b/src/northbridge/amd/amdk8/coherent_ht.c index 39602181c1..c331a1e53d 100644 --- a/src/northbridge/amd/amdk8/coherent_ht.c +++ b/src/northbridge/amd/amdk8/coherent_ht.c @@ -66,6 +66,7 @@ #include <device/pci_def.h> #include <device/pci_ids.h> #include <device/hypertransport_def.h> +#include <stdlib.h> #include "arch/romcc_io.h" #include "amdk8.h" @@ -510,7 +511,7 @@ static void setup_remote_node(u8 node) print_spew("setup_remote_node: "); /* copy the default resource map from node 0 */ - for(i = 0; i < sizeof(pci_reg)/sizeof(pci_reg[0]); i++) { + for(i = 0; i < ARRAY_SIZE(pci_reg); i++) { uint32_t value; uint8_t reg; reg = pci_reg[i]; @@ -802,7 +803,7 @@ static unsigned setup_smp4(void) }; #endif - setup_row_indirect_group(conn4_1, sizeof(conn4_1)/sizeof(conn4_1[0])); + setup_row_indirect_group(conn4_1, ARRAY_SIZE(conn4_1)); setup_temp_row(0,2); verify_connection(7); @@ -893,7 +894,7 @@ static unsigned setup_smp4(void) 3,0,1,1, }; #endif - setup_remote_row_indirect_group(conn4_3, sizeof(conn4_3)/sizeof(conn4_3[0])); + setup_remote_row_indirect_group(conn4_3, ARRAY_SIZE(conn4_3)); /* ready to enable RT for Node 3 */ rename_temp_node(3); @@ -909,7 +910,7 @@ static unsigned setup_smp4(void) 2,1,0,1, }; #endif - setup_row_indirect_group(conn4_2, sizeof(conn4_2)/sizeof(conn4_2[0])); + setup_row_indirect_group(conn4_2, ARRAY_SIZE(conn4_2)); #if 0 /*We need to do sth to reverse work for setup_temp_row (0,1) (1,3) */ @@ -974,7 +975,7 @@ static unsigned setup_smp6(void) #endif }; - setup_row_indirect_group(conn6_1, sizeof(conn6_1)/sizeof(conn6_1[0])); + setup_row_indirect_group(conn6_1, ARRAY_SIZE(conn6_1)); for(byte=0; byte<4; byte+=2) { setup_temp_row(byte,byte+2); @@ -998,7 +999,7 @@ static unsigned setup_smp6(void) #endif }; - setup_remote_row_indirect_group(conn6_2, sizeof(conn6_2)/sizeof(conn6_2[0])); + setup_remote_row_indirect_group(conn6_2, ARRAY_SIZE(conn6_2)); rename_temp_node(4); enable_routing(4); @@ -1084,7 +1085,7 @@ static unsigned setup_smp6(void) #endif }; - setup_remote_row_indirect_group(conn6_3, sizeof(conn6_3)/sizeof(conn6_3[0])); + setup_remote_row_indirect_group(conn6_3, ARRAY_SIZE(conn6_3)); /* ready to enable RT for 5 */ rename_temp_node(5); @@ -1110,7 +1111,7 @@ static unsigned setup_smp6(void) #endif }; - setup_row_indirect_group(conn6_4, sizeof(conn6_4)/sizeof(conn6_4[0])); + setup_row_indirect_group(conn6_4, ARRAY_SIZE(conn6_4)); #if 0 /* We need to do sth about reverse about setup_temp_row (0,1), (2,4), (1, 3), (3,5) @@ -1202,7 +1203,7 @@ static unsigned setup_smp8(void) #endif }; - setup_row_indirect_group(conn8_1,sizeof(conn8_1)/sizeof(conn8_1[0])); + setup_row_indirect_group(conn8_1,ARRAY_SIZE(conn8_1)); for(byte=0; byte<6; byte+=2) { setup_temp_row(byte,byte+2); @@ -1225,7 +1226,7 @@ static unsigned setup_smp8(void) #endif }; - setup_remote_row_indirect_group(conn8_2, sizeof(conn8_2)/sizeof(conn8_2[0])); + setup_remote_row_indirect_group(conn8_2, ARRAY_SIZE(conn8_2)); #if CROSS_BAR_47_56 //init 5, 6 here @@ -1414,7 +1415,7 @@ static unsigned setup_smp8(void) #endif }; - setup_row_indirect_group(conn8_3, sizeof(conn8_3)/sizeof(conn8_3[0])); + setup_row_indirect_group(conn8_3, ARRAY_SIZE(conn8_3)); #if CROSS_BAR_47_56 /* for 47, 56, 57, 75, 46, 64 we need to substract another link to @@ -1455,7 +1456,7 @@ static unsigned setup_smp8(void) 7, 3, 6, }; - opt_broadcast_rt_group(conn8_4, sizeof(conn8_4)/sizeof(conn8_4[0])); + opt_broadcast_rt_group(conn8_4, ARRAY_SIZE(conn8_4)); static const u8 conn8_5[] = { 2, 7, 0, @@ -1463,7 +1464,7 @@ static unsigned setup_smp8(void) 3, 6, 1, }; - opt_broadcast_rt_plus_group(conn8_5, sizeof(conn8_5)/sizeof(conn8_5[0])); + opt_broadcast_rt_plus_group(conn8_5, ARRAY_SIZE(conn8_5)); #endif @@ -1770,7 +1771,7 @@ static int optimize_link_coherent_ht(void) 1,3, 2,3, }; - needs_reset |= optimize_connection_group(opt_conn4, sizeof(opt_conn4)/sizeof(opt_conn4[0])); + needs_reset |= optimize_connection_group(opt_conn4, ARRAY_SIZE(opt_conn4)); } #endif @@ -1783,7 +1784,7 @@ static int optimize_link_coherent_ht(void) 4, 5, #endif }; - needs_reset |= optimize_connection_group(opt_conn6, sizeof(opt_conn6)/sizeof(opt_conn6[0])); + needs_reset |= optimize_connection_group(opt_conn6, ARRAY_SIZE(opt_conn6)); } #endif @@ -1798,7 +1799,7 @@ static int optimize_link_coherent_ht(void) 5, 7, 6, 7, }; - needs_reset |= optimize_connection_group(opt_conn8, sizeof(opt_conn8)/sizeof(opt_conn8[0])); + needs_reset |= optimize_connection_group(opt_conn8, ARRAY_SIZE(opt_conn8)); } #endif diff --git a/src/northbridge/amd/amdk8/raminit.c b/src/northbridge/amd/amdk8/raminit.c index 2e05bffe0f..51c2321b44 100644 --- a/src/northbridge/amd/amdk8/raminit.c +++ b/src/northbridge/amd/amdk8/raminit.c @@ -10,6 +10,7 @@ #include <cpu/x86/mem.h> #include <cpu/x86/cache.h> #include <cpu/x86/mtrr.h> +#include <stdlib.h> #include "raminit.h" #include "amdk8.h" @@ -555,7 +556,7 @@ static void sdram_set_registers(const struct mem_controller *ctrl) print_spew("setting up CPU"); print_spew_hex8(ctrl->node_id); print_spew(" northbridge registers\r\n"); - max = sizeof(register_values)/sizeof(register_values[0]); + max = ARRAY_SIZE(register_values); for(i = 0; i < max; i += 3) { device_t dev; unsigned where; @@ -1303,7 +1304,7 @@ static long spd_enable_2channels(const struct mem_controller *ctrl, long dimm_ma } device0 = ctrl->channel0[i]; device1 = ctrl->channel1[i]; - for(j = 0; j < sizeof(addresses)/sizeof(addresses[0]); j++) { + for(j = 0; j < ARRAY_SIZE(addresses); j++) { unsigned addr; addr = addresses[j]; value0 = spd_read_byte(device0, addr); diff --git a/src/northbridge/amd/amdk8/raminit_f.c b/src/northbridge/amd/amdk8/raminit_f.c index 94b1d461ef..a883fa401d 100644 --- a/src/northbridge/amd/amdk8/raminit_f.c +++ b/src/northbridge/amd/amdk8/raminit_f.c @@ -25,6 +25,7 @@ #include <cpu/x86/mtrr.h> #include <cpu/x86/tsc.h> +#include <stdlib.h> #include "raminit.h" #include "amdk8_f.h" #include "spd_ddr2.h" @@ -715,7 +716,7 @@ static void sdram_set_registers(const struct mem_controller *ctrl, struct sys_in print_spew("setting up CPU"); print_spew_hex8(ctrl->node_id); print_spew(" northbridge registers\r\n"); - max = sizeof(register_values)/sizeof(register_values[0]); + max = ARRAY_SIZE(register_values); for (i = 0; i < max; i += 3) { device_t dev; unsigned where; @@ -1496,7 +1497,7 @@ static long spd_enable_2channels(const struct mem_controller *ctrl, struct mem_i } device0 = ctrl->channel0[i]; device1 = ctrl->channel1[i]; - for (j = 0; j < sizeof(addresses)/sizeof(addresses[0]); j++) { + for (j = 0; j < ARRAY_SIZE(addresses); j++) { unsigned addr; addr = addresses[j]; value0 = spd_read_byte(device0, addr); diff --git a/src/northbridge/amd/amdk8/raminit_test.c b/src/northbridge/amd/amdk8/raminit_test.c index 8e323ea859..b3a4641355 100644 --- a/src/northbridge/amd/amdk8/raminit_test.c +++ b/src/northbridge/amd/amdk8/raminit_test.c @@ -4,6 +4,7 @@ #include <string.h> #include <setjmp.h> #include <device/pci_def.h> +#include <stdlib.h> #include "amdk8.h" jmp_buf end_buf; @@ -341,7 +342,7 @@ static void raminit_main(void) }; console_init(); memreset_setup(); - sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu); + sdram_initialize(ARRAY_SIZE(cpu), cpu); } diff --git a/src/northbridge/amd/amdk8/resourcemap.c b/src/northbridge/amd/amdk8/resourcemap.c index 95ac3b6366..4b6833204c 100644 --- a/src/northbridge/amd/amdk8/resourcemap.c +++ b/src/northbridge/amd/amdk8/resourcemap.c @@ -253,6 +253,6 @@ static void setup_default_resource_map(void) PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x00000000, }; int max; - max = sizeof(register_values)/sizeof(register_values[0]); + max = ARRAY_SIZE(register_values); setup_resource_map(register_values, max); } diff --git a/src/northbridge/amd/gx2/chipsetinit.c b/src/northbridge/amd/gx2/chipsetinit.c index 4751886a45..e75135d719 100644 --- a/src/northbridge/amd/gx2/chipsetinit.c +++ b/src/northbridge/amd/gx2/chipsetinit.c @@ -177,7 +177,7 @@ struct FLASH_DEVICE FlashInitTable[] = { { FLASH_TYPE_NONE, 0, 0 }, /* CS3, or Flash Device 3 */ }; -#define FlashInitTableLen (sizeof(FlashInitTable)/sizeof(FlashInitTable[0])) +#define FlashInitTableLen (ARRAY_SIZE(FlashInitTable)) uint32_t FlashPort[] = { MDD_LBAR_FLSH0, |