diff options
Diffstat (limited to 'src/northbridge/amd')
29 files changed, 0 insertions, 39 deletions
diff --git a/src/northbridge/amd/agesa/family10/northbridge.c b/src/northbridge/amd/agesa/family10/northbridge.c index 73545a0e0a..4b2d003462 100644 --- a/src/northbridge/amd/agesa/family10/northbridge.c +++ b/src/northbridge/amd/agesa/family10/northbridge.c @@ -1440,4 +1440,3 @@ struct chip_operations northbridge_amd_agesa_family10_root_complex_ops = { CHIP_NAME("AMD FAM10 Root Complex") .enable_dev = root_complex_enable_dev, }; - diff --git a/src/northbridge/amd/agesa/family14/fam14_callouts.c b/src/northbridge/amd/agesa/family14/fam14_callouts.c index 05d378dc5a..3be5037d82 100644 --- a/src/northbridge/amd/agesa/family14/fam14_callouts.c +++ b/src/northbridge/amd/agesa/family14/fam14_callouts.c @@ -37,4 +37,3 @@ AGESA_STATUS BiosReadSpd (UINT32 Func, UINT32 Data, VOID *ConfigPtr) return Status; } - diff --git a/src/northbridge/amd/agesa/family15/fam15_callouts.c b/src/northbridge/amd/agesa/family15/fam15_callouts.c index 5aa50ef261..3b6549224b 100644 --- a/src/northbridge/amd/agesa/family15/fam15_callouts.c +++ b/src/northbridge/amd/agesa/family15/fam15_callouts.c @@ -25,4 +25,3 @@ #include "heapManager.h" #include <northbridge/amd/agesa/family15/dimmSpd.h> #include <arch/io.h> - diff --git a/src/northbridge/amd/amdfam10/nums.h b/src/northbridge/amd/amdfam10/nums.h index 8d30cc3c89..12bac5d61c 100644 --- a/src/northbridge/amd/amdfam10/nums.h +++ b/src/northbridge/amd/amdfam10/nums.h @@ -38,4 +38,3 @@ #define HC_POSSIBLE_NUM 32 #endif - diff --git a/src/northbridge/amd/amdfam10/pci.c b/src/northbridge/amd/amdfam10/pci.c index b950b45eaa..061359eb92 100644 --- a/src/northbridge/amd/amdfam10/pci.c +++ b/src/northbridge/amd/amdfam10/pci.c @@ -73,5 +73,3 @@ static void pci_write_config32_index_wait(device_t dev, u32 index_reg, u32 index } #endif #endif - - diff --git a/src/northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c b/src/northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c index adf4d230ce..e3fecaa094 100644 --- a/src/northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c +++ b/src/northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c @@ -80,4 +80,3 @@ static void fill_mem_ctrl(u32 controllers, struct mem_controller *ctrl_a, const } } } - diff --git a/src/northbridge/amd/amdfam10/reset_test.c b/src/northbridge/amd/amdfam10/reset_test.c index 46c934f723..24f5397631 100644 --- a/src/northbridge/amd/amdfam10/reset_test.c +++ b/src/northbridge/amd/amdfam10/reset_test.c @@ -168,4 +168,3 @@ u8 get_sbbusn(u8 sblk) { return node_link_to_bus(0, sblk); } - diff --git a/src/northbridge/amd/amdfam10/resourcemap.c b/src/northbridge/amd/amdfam10/resourcemap.c index 50d30a20bc..c5453776f0 100644 --- a/src/northbridge/amd/amdfam10/resourcemap.c +++ b/src/northbridge/amd/amdfam10/resourcemap.c @@ -284,4 +284,3 @@ static void setup_default_resource_map(void) max = ARRAY_SIZE(register_values); setup_resource_map(register_values, max); } - diff --git a/src/northbridge/amd/amdfam10/setup_resource_map.c b/src/northbridge/amd/amdfam10/setup_resource_map.c index 2e1bff8470..2eeca44bf7 100644 --- a/src/northbridge/amd/amdfam10/setup_resource_map.c +++ b/src/northbridge/amd/amdfam10/setup_resource_map.c @@ -227,4 +227,3 @@ static void setup_io_resource_map(const u32 *register_values, u32 max) } } #endif - diff --git a/src/northbridge/amd/amdht/h3finit.h b/src/northbridge/amd/amdht/h3finit.h index e1694564c6..136a5cf735 100644 --- a/src/northbridge/amd/amdht/h3finit.h +++ b/src/northbridge/amd/amdht/h3finit.h @@ -609,5 +609,3 @@ void amdHtInitialize(AMD_HTBLOCK *pBlock); #endif /* H3FINIT_H */ - - diff --git a/src/northbridge/amd/amdht/h3gtopo.h b/src/northbridge/amd/amdht/h3gtopo.h index bcd3a418e1..624b0d803b 100644 --- a/src/northbridge/amd/amdht/h3gtopo.h +++ b/src/northbridge/amd/amdht/h3gtopo.h @@ -357,4 +357,3 @@ void getAmdTopolist(u8 ***p); #endif /* HTTOPO_H */ - diff --git a/src/northbridge/amd/amdht/h3ncmn.c b/src/northbridge/amd/amdht/h3ncmn.c index cba21b3349..830ed1cc22 100644 --- a/src/northbridge/amd/amdht/h3ncmn.c +++ b/src/northbridge/amd/amdht/h3ncmn.c @@ -2219,4 +2219,3 @@ void newNorthBridge(u8 node, cNorthBridge *nb) /* Update the initial limited key to the real one, which may include other matching info */ nb->compatibleKey = makeKey(node); } - diff --git a/src/northbridge/amd/amdht/ht_wrapper.c b/src/northbridge/amd/amdht/ht_wrapper.c index 8efd4cb7be..57424948b4 100644 --- a/src/northbridge/amd/amdht/ht_wrapper.c +++ b/src/northbridge/amd/amdht/ht_wrapper.c @@ -143,7 +143,3 @@ static void amd_ht_init(struct sys_info *sysinfo) } - - - - diff --git a/src/northbridge/amd/amdk8/acpi.c b/src/northbridge/amd/amdk8/acpi.c index 2eb39c07d1..f7134f6e6c 100644 --- a/src/northbridge/amd/amdk8/acpi.c +++ b/src/northbridge/amd/amdk8/acpi.c @@ -307,4 +307,3 @@ void update_ssdtx(void *ssdtx, int i) /* FIXME: need to update the GSI id in the ssdtx too */ } - diff --git a/src/northbridge/amd/amdk8/coherent_ht.c b/src/northbridge/amd/amdk8/coherent_ht.c index 22d74c2c16..5219d4c20e 100644 --- a/src/northbridge/amd/amdk8/coherent_ht.c +++ b/src/northbridge/amd/amdk8/coherent_ht.c @@ -1854,4 +1854,3 @@ static int setup_coherent_ht_domain(void) return optimize_link_coherent_ht(); #endif } - diff --git a/src/northbridge/amd/amdk8/early_ht.c b/src/northbridge/amd/amdk8/early_ht.c index 2ecc0d0d60..6449f4b1f5 100644 --- a/src/northbridge/amd/amdk8/early_ht.c +++ b/src/northbridge/amd/amdk8/early_ht.c @@ -140,4 +140,3 @@ out: #endif } - diff --git a/src/northbridge/amd/amdk8/get_sblk_pci1234.c b/src/northbridge/amd/amdk8/get_sblk_pci1234.c index a4943bd2b9..6fdc3c4305 100644 --- a/src/northbridge/amd/amdk8/get_sblk_pci1234.c +++ b/src/northbridge/amd/amdk8/get_sblk_pci1234.c @@ -260,4 +260,3 @@ void get_sblk_pci1234(void) } } - diff --git a/src/northbridge/amd/amdk8/incoherent_ht.c b/src/northbridge/amd/amdk8/incoherent_ht.c index c1509f06c2..9d92174855 100644 --- a/src/northbridge/amd/amdk8/incoherent_ht.c +++ b/src/northbridge/amd/amdk8/incoherent_ht.c @@ -864,6 +864,3 @@ static int optimize_link_incoherent_ht(struct sys_info *sysinfo) } #endif - - - diff --git a/src/northbridge/amd/amdk8/reset_test.c b/src/northbridge/amd/amdk8/reset_test.c index bee3faa0ce..6ef3ec0c59 100644 --- a/src/northbridge/amd/amdk8/reset_test.c +++ b/src/northbridge/amd/amdk8/reset_test.c @@ -84,4 +84,3 @@ static inline unsigned get_sbbusn(unsigned sblk) { return node_link_to_bus(0, sblk); } - diff --git a/src/northbridge/amd/amdk8/setup_resource_map.c b/src/northbridge/amd/amdk8/setup_resource_map.c index 8d1052e845..230459ab7f 100644 --- a/src/northbridge/amd/amdk8/setup_resource_map.c +++ b/src/northbridge/amd/amdk8/setup_resource_map.c @@ -182,4 +182,3 @@ static void setup_mem_resource_map(const unsigned int *register_values, int max) } } #endif - diff --git a/src/northbridge/amd/amdmct/mct/mctardk3.c b/src/northbridge/amd/amdmct/mct/mctardk3.c index 9bc30fefce..b70385b5ef 100644 --- a/src/northbridge/amd/amdmct/mct/mctardk3.c +++ b/src/northbridge/amd/amdmct/mct/mctardk3.c @@ -203,4 +203,3 @@ static void Get_ChannelPS_Cfg0_D(u8 MAAdimms, u8 Speed, u8 MAAload, p+=11; } } - diff --git a/src/northbridge/amd/amdmct/mct/mctcsi_d.c b/src/northbridge/amd/amdmct/mct/mctcsi_d.c index 130a775002..71f782925c 100644 --- a/src/northbridge/amd/amdmct/mct/mctcsi_d.c +++ b/src/northbridge/amd/amdmct/mct/mctcsi_d.c @@ -143,5 +143,3 @@ void InterleaveBanks_D(struct MCTStatStruc *pMCTstat, print_tx("InterleaveBanks_D: ErrCode ", pDCTstat->ErrCode); print_t("InterleaveBanks_D: Done\n"); } - - diff --git a/src/northbridge/amd/amdmct/mct/mcttmrl.c b/src/northbridge/amd/amdmct/mct/mcttmrl.c index f94494d331..03ebf97c82 100644 --- a/src/northbridge/amd/amdmct/mct/mcttmrl.c +++ b/src/northbridge/amd/amdmct/mct/mcttmrl.c @@ -409,5 +409,3 @@ u8 mct_GetStartMaxRdLat_D(struct MCTStatStruc *pMCTstat, return val; } - - diff --git a/src/northbridge/amd/amdmct/wrappers/mcti.h b/src/northbridge/amd/amdmct/wrappers/mcti.h index 100f9325b1..a92fdb8ba4 100644 --- a/src/northbridge/amd/amdmct/wrappers/mcti.h +++ b/src/northbridge/amd/amdmct/wrappers/mcti.h @@ -71,4 +71,3 @@ UPDATE AS NEEDED #define MCT_TRNG_KEEPOUT_START 0x00000C00 #define MCT_TRNG_KEEPOUT_END 0x00000CFF - diff --git a/src/northbridge/amd/cimx/rd890/NbPlatform.h b/src/northbridge/amd/cimx/rd890/NbPlatform.h index 29b5d645ab..20f797468f 100644 --- a/src/northbridge/amd/cimx/rd890/NbPlatform.h +++ b/src/northbridge/amd/cimx/rd890/NbPlatform.h @@ -144,4 +144,3 @@ #define CIMX_NBPCIE_MISC 0xFFFFFFFF #endif - diff --git a/src/northbridge/amd/cimx/rd890/chip.h b/src/northbridge/amd/cimx/rd890/chip.h index 237d55c4d4..d76ea82a91 100644 --- a/src/northbridge/amd/cimx/rd890/chip.h +++ b/src/northbridge/amd/cimx/rd890/chip.h @@ -32,4 +32,3 @@ struct northbridge_amd_cimx_rd890_config }; #endif /* _CIMX_RD890_CHIP_H_ */ - diff --git a/src/northbridge/amd/cimx/rd890/nb_cimx.h b/src/northbridge/amd/cimx/rd890/nb_cimx.h index e09af0a635..7466d9ac82 100644 --- a/src/northbridge/amd/cimx/rd890/nb_cimx.h +++ b/src/northbridge/amd/cimx/rd890/nb_cimx.h @@ -41,4 +41,3 @@ void nb_Pcie_Early_Init(void); void nb_Pcie_Late_Init(void); #endif//_RD890_EARLY_H_ - diff --git a/src/northbridge/amd/gx2/grphinit.c b/src/northbridge/amd/gx2/grphinit.c index d7e2c08dd9..b58519f660 100644 --- a/src/northbridge/amd/gx2/grphinit.c +++ b/src/northbridge/amd/gx2/grphinit.c @@ -87,5 +87,3 @@ void graphics_init(void) res = vrRead(wClassIndex); printk(BIOS_DEBUG, "VRC_VG value: 0x%04x\n", res); } - - diff --git a/src/northbridge/amd/gx2/northbridgeinit.c b/src/northbridge/amd/gx2/northbridgeinit.c index ef5277c50d..136dcf2e02 100644 --- a/src/northbridge/amd/gx2/northbridgeinit.c +++ b/src/northbridge/amd/gx2/northbridgeinit.c @@ -675,4 +675,3 @@ void northbridge_init_early(void) __asm__ __volatile__("FINIT\n"); printk(BIOS_DEBUG, "Exit %s\n", __func__); } - |