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-rw-r--r--src/northbridge/amd/pi/00730F01/Makefile.inc1
-rw-r--r--src/northbridge/amd/pi/00730F01/acpi_tables.c33
2 files changed, 34 insertions, 0 deletions
diff --git a/src/northbridge/amd/pi/00730F01/Makefile.inc b/src/northbridge/amd/pi/00730F01/Makefile.inc
index b97b335b70..8fc4ffce6e 100644
--- a/src/northbridge/amd/pi/00730F01/Makefile.inc
+++ b/src/northbridge/amd/pi/00730F01/Makefile.inc
@@ -4,6 +4,7 @@ romstage-y += dimmSpd.c
ramstage-y += northbridge.c
ramstage-y += iommu.c
+ramstage-y += acpi_tables.c
romstage-y += state_machine.c
ramstage-y += state_machine.c
diff --git a/src/northbridge/amd/pi/00730F01/acpi_tables.c b/src/northbridge/amd/pi/00730F01/acpi_tables.c
new file mode 100644
index 0000000000..2cc9bf58e1
--- /dev/null
+++ b/src/northbridge/amd/pi/00730F01/acpi_tables.c
@@ -0,0 +1,33 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <acpi/acpi.h>
+#include <arch/ioapic.h>
+
+unsigned long acpi_fill_madt(unsigned long current)
+{
+ /* create all subtables for processors */
+ current = acpi_create_madt_lapics(current);
+
+ /* Write SB800 IOAPIC, only one */
+ current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, CONFIG_MAX_CPUS,
+ IO_APIC_ADDR, 0);
+
+ /* TODO: Remove the hardcode */
+ current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, CONFIG_MAX_CPUS+1,
+ 0xFEC20000, 24);
+
+ current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
+ current, 0, 0, 2, 0);
+ current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
+ current, 0, 9, 9, 0xF);
+ /* 0: mean bus 0--->ISA */
+ /* 0: PIC 0 */
+ /* 2: APIC 2 */
+ /* 5 mean: 0101 --> Edge-triggered, Active high */
+
+ /* create all subtables for processors */
+ current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *)current, 0xff, 5, 1);
+ /* 1: LINT1 connect to NMI */
+
+ return current;
+}