4 files changed, 21 insertions, 0 deletions
diff --git a/src/northbridge/amd/pi/00630F01/northbridge.c b/src/northbridge/amd/pi/00630F01/northbridge.c
index abe7f1f8d8..ed7203de2d 100644
--- a/src/northbridge/amd/pi/00630F01/northbridge.c
+++ b/src/northbridge/amd/pi/00630F01/northbridge.c
@@ -35,8 +35,10 @@
 #include <cpu/amd/amdfam15.h>
 #include <cpuRegisters.h>
 #include <northbridge/amd/agesa/agesa_helper.h>
+#if IS_ENABLED(CONFIG_BINARYPI_LEGACY_WRAPPER)
 #include <northbridge/amd/pi/agesawrapper.h>
 #include <northbridge/amd/pi/agesawrapper_call.h>
+#endif
 #include "northbridge.h"
 
 #include <cpu/x86/lapic.h>
@@ -630,6 +632,7 @@ static void domain_read_resources(device_t dev)
 
 static void domain_enable_resources(device_t dev)
 {
+#if IS_ENABLED(CONFIG_BINARYPI_LEGACY_WRAPPER)
 	/* Must be called after PCI enumeration and resource allocation */
 	if (!acpi_is_wakeup_s3()) {
 		/* Enable MMIO on AMD CPU Address Map Controller */
@@ -638,6 +641,7 @@ static void domain_enable_resources(device_t dev)
 		agesawrapper_amdinitmid();
 	}
 	printk(BIOS_DEBUG, "  ader - leaving %s.\n", __func__);
+#endif
 }
 
 #if CONFIG_HW_MEM_HOLE_SIZEK != 0
diff --git a/src/northbridge/amd/pi/00660F01/northbridge.c b/src/northbridge/amd/pi/00660F01/northbridge.c
index 32feff4970..3b0985bbaa 100644
--- a/src/northbridge/amd/pi/00660F01/northbridge.c
+++ b/src/northbridge/amd/pi/00660F01/northbridge.c
@@ -35,8 +35,10 @@
 #include <cpu/amd/amdfam15.h>
 #include <cpuRegisters.h>
 #include <northbridge/amd/agesa/agesa_helper.h>
+#if IS_ENABLED(CONFIG_BINARYPI_LEGACY_WRAPPER)
 #include <northbridge/amd/pi/agesawrapper.h>
 #include <northbridge/amd/pi/agesawrapper_call.h>
+#endif
 #include "northbridge.h"
 
 #include <cpu/x86/lapic.h>
@@ -635,11 +637,13 @@ static void domain_read_resources(device_t dev)
 
 static void domain_enable_resources(device_t dev)
 {
+#if IS_ENABLED(CONFIG_BINARYPI_LEGACY_WRAPPER)
 	/* Must be called after PCI enumeration and resource allocation */
 	if (!acpi_is_wakeup_s3())
 		AGESAWRAPPER(amdinitmid);
 
 	printk(BIOS_DEBUG, "  ader - leaving domain_enable_resources.\n");
+#endif
 }
 
 #if CONFIG_HW_MEM_HOLE_SIZEK != 0
diff --git a/src/northbridge/amd/pi/00730F01/northbridge.c b/src/northbridge/amd/pi/00730F01/northbridge.c
index 2643c023e5..6dc1860c5f 100644
--- a/src/northbridge/amd/pi/00730F01/northbridge.c
+++ b/src/northbridge/amd/pi/00730F01/northbridge.c
@@ -35,8 +35,10 @@
 #include <cpu/amd/amdfam16.h>
 #include <cpuRegisters.h>
 #include <northbridge/amd/agesa/agesa_helper.h>
+#if IS_ENABLED(CONFIG_BINARYPI_LEGACY_WRAPPER)
 #include <northbridge/amd/pi/agesawrapper.h>
 #include <northbridge/amd/pi/agesawrapper_call.h>
+#endif
 #include "northbridge.h"
 
 #include <cpu/x86/lapic.h>
@@ -649,11 +651,13 @@ static void domain_read_resources(device_t dev)
 
 static void domain_enable_resources(device_t dev)
 {
+#if IS_ENABLED(CONFIG_BINARYPI_LEGACY_WRAPPER)
 	/* Must be called after PCI enumeration and resource allocation */
 	if (!acpi_is_wakeup_s3())
 		AGESAWRAPPER(amdinitmid);
 
 	printk(BIOS_DEBUG, "  ader - leaving domain_enable_resources.\n");
+#endif
 }
 
 #if CONFIG_HW_MEM_HOLE_SIZEK != 0
diff --git a/src/northbridge/amd/pi/Makefile.inc b/src/northbridge/amd/pi/Makefile.inc
index 43c6e83ab4..b4d8c95f45 100644
--- a/src/northbridge/amd/pi/Makefile.inc
+++ b/src/northbridge/amd/pi/Makefile.inc
@@ -19,8 +19,17 @@ subdirs-$(CONFIG_NORTHBRIDGE_AMD_PI_00630F01) += 00630F01
 subdirs-$(CONFIG_NORTHBRIDGE_AMD_PI_00730F01) += 00730F01
 subdirs-$(CONFIG_NORTHBRIDGE_AMD_PI_00660F01) += 00660F01
 
+ifeq ($(CONFIG_BINARYPI_LEGACY_WRAPPER), y)
 romstage-y += agesawrapper.c
 ramstage-y += agesawrapper.c
+else
+romstage-y += ../agesa/state_machine.c
+ramstage-y += ../agesa/state_machine.c
+
+romstage-y += ../agesa/eventlog.c
+ramstage-y += ../agesa/eventlog.c
+
+endif
 
 romstage-y += ../agesa/def_callouts.c ../agesa/eventlog.c
 ramstage-y += ../agesa/def_callouts.c ../agesa/eventlog.c ../agesa/acpi_tables.c