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-rw-r--r--src/northbridge/amd/pi/agesawrapper.c4
-rw-r--r--src/northbridge/amd/pi/ramtop.c4
2 files changed, 4 insertions, 4 deletions
diff --git a/src/northbridge/amd/pi/agesawrapper.c b/src/northbridge/amd/pi/agesawrapper.c
index ec1d0acf9f..d4b9984f81 100644
--- a/src/northbridge/amd/pi/agesawrapper.c
+++ b/src/northbridge/amd/pi/agesawrapper.c
@@ -153,9 +153,9 @@ AGESA_STATUS agesawrapper_amdinitpost(void)
* UMA may or may not be cacheable, so Sub4GCacheTop could be
* higher than UmaBase. With UMA_NONE we see UmaBase==0. */
if (PostParams->MemConfig.UmaBase)
- backup_top_of_ram(PostParams->MemConfig.UmaBase << 16);
+ backup_top_of_low_cacheable(PostParams->MemConfig.UmaBase << 16);
else
- backup_top_of_ram(PostParams->MemConfig.Sub4GCacheTop);
+ backup_top_of_low_cacheable(PostParams->MemConfig.Sub4GCacheTop);
printk(
BIOS_SPEW,
diff --git a/src/northbridge/amd/pi/ramtop.c b/src/northbridge/amd/pi/ramtop.c
index 2b501dcf05..8fa81c715a 100644
--- a/src/northbridge/amd/pi/ramtop.c
+++ b/src/northbridge/amd/pi/ramtop.c
@@ -19,13 +19,13 @@
#define CBMEM_TOP_SCRATCHPAD 0x78
-void backup_top_of_ram(uint64_t ramtop)
+void backup_top_of_low_cacheable(uintptr_t ramtop)
{
uint16_t top_cache = ramtop >> 16;
pci_write_config16(PCI_DEV(0,0,0), CBMEM_TOP_SCRATCHPAD, top_cache);
}
-unsigned long get_top_of_ram(void)
+uintptr_t restore_top_of_low_cacheable(void)
{
uint16_t top_cache;
top_cache = pci_read_config16(PCI_DEV(0,0,0), CBMEM_TOP_SCRATCHPAD);