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Diffstat (limited to 'src/northbridge/amd/pi/00730F01')
-rw-r--r--src/northbridge/amd/pi/00730F01/northbridge.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/northbridge/amd/pi/00730F01/northbridge.c b/src/northbridge/amd/pi/00730F01/northbridge.c
index 9b1c1b1691..6f7f993046 100644
--- a/src/northbridge/amd/pi/00730F01/northbridge.c
+++ b/src/northbridge/amd/pi/00730F01/northbridge.c
@@ -156,7 +156,7 @@ static void f1_write_config32(unsigned reg, u32 value)
int i;
if (fx_devs == 0)
get_fx_devs();
- for(i = 0; i < fx_devs; i++) {
+ for (i = 0; i < fx_devs; i++) {
device_t dev;
dev = __f1_dev[i];
if (dev && dev->enabled) {
@@ -349,7 +349,7 @@ static void read_resources(device_t dev)
* It is not honored by the coreboot resource allocator if it is in
* the CPU_CLUSTER.
*/
- if(IS_ENABLED(CONFIG_MMCONF_SUPPORT))
+ if (IS_ENABLED(CONFIG_MMCONF_SUPPORT))
enable_mmconf_resource(dev);
}
@@ -417,7 +417,7 @@ static void create_vga_resource(device_t dev, unsigned nodeid)
printk(BIOS_DEBUG, "VGA: vga_pri bus num = %d bus range [%d,%d]\n", vga_pri->bus->secondary,
link->secondary,link->subordinate);
/* We need to make sure the vga_pri is under the link */
- if((vga_pri->bus->secondary >= link->secondary ) &&
+ if ((vga_pri->bus->secondary >= link->secondary ) &&
(vga_pri->bus->secondary <= link->subordinate )
)
#endif
@@ -879,7 +879,7 @@ static void domain_set_resources(device_t dev)
set_top_of_ram(ramtop);
#endif
- for(link = dev->link_list; link; link = link->next) {
+ for (link = dev->link_list; link; link = link->next) {
if (link->children) {
assign_resources(link);
}
@@ -1060,7 +1060,7 @@ static void cpu_bus_scan(device_t dev)
* ensure all of the cpu's pci devices are found.
*/
int fn;
- for(fn = 0; fn <= 5; fn++) { //FBDIMM?
+ for (fn = 0; fn <= 5; fn++) { //FBDIMM?
cdb_dev = pci_probe_dev(NULL, pbus,
PCI_DEVFN(devn, fn));
}