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Diffstat (limited to 'src/northbridge/amd/lx/pll_reset.c')
-rw-r--r--src/northbridge/amd/lx/pll_reset.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/src/northbridge/amd/lx/pll_reset.c b/src/northbridge/amd/lx/pll_reset.c
index 1f8e499825..3077b61c9c 100644
--- a/src/northbridge/amd/lx/pll_reset.c
+++ b/src/northbridge/amd/lx/pll_reset.c
@@ -59,9 +59,8 @@ static void pll_reset(char manualconf)
wrmsr(GLCP_SYS_RSTPLL, msrGlcpSysRstpll);
/* You should never get here..... The chip has reset. */
- printk(BIOS_ERR, "CONFIGURING PLL FAILURE\n");
post_code(POST_PLL_RESET_FAIL);
- __asm__ __volatile__("hlt\n");
+ die("CONFIGURING PLL FAILURE\n");
}
printk(BIOS_DEBUG, "PLL configured.\n");