summaryrefslogtreecommitdiff
path: root/src/northbridge/amd/amdmct
diff options
context:
space:
mode:
Diffstat (limited to 'src/northbridge/amd/amdmct')
-rw-r--r--src/northbridge/amd/amdmct/mct_ddr3/mct_d.c4
-rw-r--r--src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c2
2 files changed, 3 insertions, 3 deletions
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
index 18f96c62a6..cd1f165645 100644
--- a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
+++ b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
@@ -2364,10 +2364,10 @@ void precise_ndelay_fam15(struct MCTStatStruc *pMCTstat, uint32_t nanoseconds) {
uint64_t start_timestamp;
uint64_t current_timestamp;
- tsc_msr = rdmsr(0x00000010);
+ tsc_msr = rdmsr(TSC_MSR);
start_timestamp = (((uint64_t)tsc_msr.hi) << 32) | tsc_msr.lo;
do {
- tsc_msr = rdmsr(0x00000010);
+ tsc_msr = rdmsr(TSC_MSR);
current_timestamp = (((uint64_t)tsc_msr.hi) << 32) | tsc_msr.lo;
} while ((current_timestamp - start_timestamp) < cycle_count);
}
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c b/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c
index 1db1b54307..42627e8445 100644
--- a/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c
+++ b/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c
@@ -2427,7 +2427,7 @@ void mct_Wait(u32 cycles)
cycles <<= 3; /* x8 (number of 1.25ns ticks) */
- msr = 0x10; /* TSC */
+ msr = TSC_MSR; /* TSC */
_RDMSR(msr, &lo, &hi);
saved = lo;
do {