diff options
Diffstat (limited to 'src/northbridge/amd/amdmct/mct_ddr3/mctecc_d.c')
| -rw-r--r-- | src/northbridge/amd/amdmct/mct_ddr3/mctecc_d.c | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctecc_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mctecc_d.c index ca3678997b..9aad96cfbc 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mctecc_d.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/mctecc_d.c @@ -14,12 +14,31 @@ * GNU General Public License for more details. */ +#include <inttypes.h> +#include <console/console.h> +#include <string.h> #include "mct_d.h" +#include "mct_d_gcc.h" static void setSyncOnUnEccEn_D(struct MCTStatStruc *pMCTstat, struct DCTStatStruc *pDCTstatA); static u8 isDramECCEn_D(struct DCTStatStruc *pDCTstat); +static uint8_t is_fam15h(void) +{ + uint8_t fam15h = 0; + uint32_t family; + + family = cpuid_eax(0x80000001); + family = ((family & 0xf00000) >> 16) | ((family & 0xf00) >> 8); + + if (family >= 0x6f) + /* Family 15h or later */ + fam15h = 1; + + return fam15h; +} + /* Initialize ECC modes of Integrated Dram+Memory Controllers of a network of * Hammer processors. Use Dram background scrubber to fast initialize ECC bits * of all dram. |