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path: root/src/northbridge/amd/amdmct/mct_ddr3/mctcsi_d.c
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Diffstat (limited to 'src/northbridge/amd/amdmct/mct_ddr3/mctcsi_d.c')
-rw-r--r--src/northbridge/amd/amdmct/mct_ddr3/mctcsi_d.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctcsi_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mctcsi_d.c
index 253a89fbc0..da7ce165ed 100644
--- a/src/northbridge/amd/amdmct/mct_ddr3/mctcsi_d.c
+++ b/src/northbridge/amd/amdmct/mct_ddr3/mctcsi_d.c
@@ -98,7 +98,7 @@ void InterleaveBanks_D(struct MCTStatStruc *pMCTstat,
BitDelta = bsf(AddrHiMask) - bsf(AddrLoMask);
for (ChipSel = 0; ChipSel < MAX_CS_SUPPORTED; ChipSel++) {
- reg = 0x40+(ChipSel<<2); /*Dram CS Base 0 */
+ reg = 0x40 + (ChipSel<<2); /* Dram CS Base 0 */
val = Get_NB32_DCT(dev, dct, reg);
if (val & 3) {
val_lo = val & AddrLoMask;
@@ -114,7 +114,7 @@ void InterleaveBanks_D(struct MCTStatStruc *pMCTstat,
if(ChipSel & 1)
continue;
- reg = 0x60 + ((ChipSel>>1)<<2); /*Dram CS Mask 0 */
+ reg = 0x60 + ((ChipSel>>1)<<2); /* Dram CS Mask 0 */
val = Get_NB32_DCT(dev, dct, reg);
val_lo = val & AddrLoMask;
val_hi = val & AddrHiMask;