aboutsummaryrefslogtreecommitdiff
path: root/src/northbridge/amd/amdmct/mct
diff options
context:
space:
mode:
Diffstat (limited to 'src/northbridge/amd/amdmct/mct')
-rw-r--r--src/northbridge/amd/amdmct/mct/mct_d.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/northbridge/amd/amdmct/mct/mct_d.h b/src/northbridge/amd/amdmct/mct/mct_d.h
index 0a1f925291..0c6df6c25e 100644
--- a/src/northbridge/amd/amdmct/mct/mct_d.h
+++ b/src/northbridge/amd/amdmct/mct/mct_d.h
@@ -260,7 +260,7 @@ struct MCTStatStruc {
of sub 4GB dram hole for HW remapping.*/
u32 Sub4GCacheTop; /* If not zero, the 32-bit top of cacheable memory.*/
u32 SysLimit; /* LIMIT[39:8] (system address)*/
-};
+} __attribute__((packed));
/*=============================================================================
Global MCT Configuration Status Word (GStatus)
@@ -512,7 +512,7 @@ struct DCTStatStruc { /* A per Node structure*/
u32 dev_map;
u32 dev_dct;
u32 dev_nbmisc;
-};
+} __attribute__((packed));
/*===============================================================================
Local Error Status Codes (DCTStatStruc.ErrCode)