diff options
Diffstat (limited to 'src/northbridge/amd/amdmct/mct/mctpro_d.c')
| -rw-r--r-- | src/northbridge/amd/amdmct/mct/mctpro_d.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/amd/amdmct/mct/mctpro_d.c b/src/northbridge/amd/amdmct/mct/mctpro_d.c index a2d08d194e..1539a880eb 100644 --- a/src/northbridge/amd/amdmct/mct/mctpro_d.c +++ b/src/northbridge/amd/amdmct/mct/mctpro_d.c @@ -134,7 +134,7 @@ void mct_BeforeDQSTrain_Samp_D(struct MCTStatStruc *pMCTstat, /* Bug#15880: Determine validity of reset settings for DDR PHY timing * regi.. - * Solutiuon: At least, set WrDqs fine delay to be 0 for DDR2 training. + * Solution: At least, set WrDqs fine delay to be 0 for DDR2 training. */ u32 dev; |