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Diffstat (limited to 'src/northbridge/amd/amdmct/mct/mct_d.h')
-rw-r--r--src/northbridge/amd/amdmct/mct/mct_d.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/northbridge/amd/amdmct/mct/mct_d.h b/src/northbridge/amd/amdmct/mct/mct_d.h
index 148f987023..2976c8225b 100644
--- a/src/northbridge/amd/amdmct/mct/mct_d.h
+++ b/src/northbridge/amd/amdmct/mct/mct_d.h
@@ -236,7 +236,7 @@
#define SPD_MANDATEWK 94 /*Module Manufacturing Week (BCD)*/
/*-----------------------------
- Jdec DDR II related equates
+ Jedec DDR II related equates
-----------------------------*/
#define MYEAR06 6 /* Manufacturing Year BCD encoding of 2006 - 06d*/
#define MWEEK24 0x24 /* Manufacturing Week BCD encoding of June - 24d*/
@@ -436,7 +436,7 @@ struct DCTStatStruc { /* A per Node structure*/
u16 DimmWk2406; /* Bitmap indicating which Dimms have a manufactur's week code <= 24 of 2006 (June)*/
u16 DimmDRPresent; /* Bitmap indicating that Dual Rank Dimms are present*/
u16 DimmPlPresent; /* Bitmap indicating that Planar (1) or Stacked (0) Dimms are present.*/
- u16 ChannelTrainFai; /* Bitmap showing the chanel informaiton about failed Chip Selects
+ u16 ChannelTrainFai; /* Bitmap showing the channel information about failed Chip Selects
0 in any bit field indicates Channel 0
1 in any bit field indicates Channel 1 */
u16 CSUsrTestFail; /* Chip selects excluded by user */
@@ -471,7 +471,7 @@ struct DCTStatStruc { /* A per Node structure*/
u8 MaxDCTs; /* Max number of DCTs in system*/
// NOTE: removed u8 DCT. Use ->dev_ for pci R/W; /*DCT pointer*/
u8 GangedMode; /* Ganged mode enabled, 0 = disabled, 1 = enabled*/
- u8 DRPresent; /* Family 10 present flag, 0 = n0t Fam10, 1 = Fam10*/
+ u8 DRPresent; /* Family 10 present flag, 0 = not Fam10, 1 = Fam10*/
u32 NodeSysLimit; /* BASE[39:8],for DCT0+DCT1 system address*/
u8 WrDatGrossH;
u8 DqsRcvEnGrossL;