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Diffstat (limited to 'src/northbridge/amd/amdk8/raminit.c')
-rw-r--r--src/northbridge/amd/amdk8/raminit.c9
1 files changed, 8 insertions, 1 deletions
diff --git a/src/northbridge/amd/amdk8/raminit.c b/src/northbridge/amd/amdk8/raminit.c
index 0c3cbdb3d3..690a4a0a7c 100644
--- a/src/northbridge/amd/amdk8/raminit.c
+++ b/src/northbridge/amd/amdk8/raminit.c
@@ -850,14 +850,17 @@ static void set_top_mem(unsigned tom_k, unsigned hole_startk)
}
/* Report the amount of memory. */
- printk_spew("RAM: 0x%08x kB\n", tom_k);
+ printk_debug("RAM end at 0x%08x kB\n", tom_k);
/* Now set top of memory */
msr_t msr;
if (tom_k > (4*1024*1024)) {
+ printk_raminit("Handling memory mapped above 4 GB\n");
+ printk_raminit("Upper RAM end at 0x%08x kB\n", tom_k);
msr.lo = (tom_k & 0x003fffff) << 10;
msr.hi = (tom_k & 0xffc00000) >> 22;
wrmsr(TOP_MEM2, msr);
+ printk_raminit("Correcting memory amount mapped below 4 GB\n");
}
/* Leave a 64M hole between TOP_MEM and TOP_MEM2
@@ -870,7 +873,9 @@ static void set_top_mem(unsigned tom_k, unsigned hole_startk)
} else
#endif
tom_k = 0x3f0000;
+ printk_raminit("Adjusting lower RAM end\n");
}
+ printk_raminit("Lower RAM end at 0x%08x kB\n", tom_k);
msr.lo = (tom_k & 0x003fffff) << 10;
msr.hi = (tom_k & 0xffc00000) >> 22;
wrmsr(TOP_MEM, msr);
@@ -2167,6 +2172,7 @@ static void set_hw_mem_hole(int controllers, const struct mem_controller *ctrl)
hole_startk = 4*1024*1024 - HW_MEM_HOLE_SIZEK;
+ printk_raminit("Handling memory hole at 0x%08x (default)\n", hole_startk);
#if HW_MEM_HOLE_SIZE_AUTO_INC == 1
/* We need to double check if hole_startk is valid.
* If it is equal to the dram base address in K (base_k),
@@ -2191,6 +2197,7 @@ static void set_hw_mem_hole(int controllers, const struct mem_controller *ctrl)
basek_pri = base_k;
}
+ printk_raminit("Handling memory hole at 0x%08x (adjusted)\n", hole_startk);
#endif
/* Find node number that needs the memory hole configured */
for (i=0; i<controllers; i++) {