diff options
Diffstat (limited to 'src/northbridge/amd/amdht')
-rw-r--r-- | src/northbridge/amd/amdht/AsPsDefs.h | 10 | ||||
-rw-r--r-- | src/northbridge/amd/amdht/ht_wrapper.c | 23 |
2 files changed, 3 insertions, 30 deletions
diff --git a/src/northbridge/amd/amdht/AsPsDefs.h b/src/northbridge/amd/amdht/AsPsDefs.h index 86d3375f07..62b7edba6d 100644 --- a/src/northbridge/amd/amdht/AsPsDefs.h +++ b/src/northbridge/amd/amdht/AsPsDefs.h @@ -1,7 +1,7 @@ /* * This file is part of the coreboot project. * - * Copyright (C) 2007 Advanced Micro Devices, Inc. + * Copyright (C) 2007-2008 Advanced Micro Devices, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -21,14 +21,6 @@ #ifndef ASPSDEFS_H #define ASPSDEFS_H -/* AMD Platform Types */ -#define AMD_PTYPE_DSK 1 -#define AMD_PTYPE_MOB 2 -#define AMD_PTYPE_SVR 4 -#define AMD_PTYPE_DC 8 -#define AMD_PTYPE_MC 0x10 -#define AMD_PTYPE_UMA 0x20 - #define APIC_BAR 0x1b /* APIC_BAR register */ #define APIC_BAR_BP 0x100 /* APIC_BAR BSP bit */ diff --git a/src/northbridge/amd/amdht/ht_wrapper.c b/src/northbridge/amd/amdht/ht_wrapper.c index aaf67a47a7..ad276e42ef 100644 --- a/src/northbridge/amd/amdht/ht_wrapper.c +++ b/src/northbridge/amd/amdht/ht_wrapper.c @@ -1,7 +1,7 @@ /* * This file is part of the coreboot project. * - * Copyright (C) 2007 Advanced Micro Devices, Inc. + * Copyright (C) 2007-2008 Advanced Micro Devices, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -60,6 +60,7 @@ #define NODE_MP(x) NODE_PCI(x,1) #define NODE_MC(x) NODE_PCI(x,3) #define NODE_LC(x) NODE_PCI(x,4) + static u32 get_nodes(void) { device_t dev; @@ -75,26 +76,6 @@ static u32 get_nodes(void) return nodes; } -static void enable_apic_ext_id(u32 node) -{ - u32 val; - val = pci_read_config32(NODE_HT(node), 0x68); - val |= (HTTC_APIC_EXT_SPUR | HTTC_APIC_EXT_ID | HTTC_APIC_EXT_BRD_CST); - pci_write_config32(NODE_HT(node), 0x68, val); -} - - -static void setup_link_trans_cntrl() -{ - /* FIXME: Not sure that this belongs here but it is HT related */ - u32 val; - val = pci_read_config32(NODE_HT(0), 0x68); - val |= 0x00206800; // DSNpReqLimit, LimitCldtCfg, BufRefPri, RespPassPW per BKDG; - pci_write_config32(NODE_HT(0), 0x68, val); -} - - - /** * void AMD_CB_EventNotify (u8 evtClass, u16 event, const u8 *pEventData0) |