diff options
Diffstat (limited to 'src/northbridge/amd/amdht/ht_wrapper.c')
| -rw-r--r-- | src/northbridge/amd/amdht/ht_wrapper.c | 43 |
1 files changed, 25 insertions, 18 deletions
diff --git a/src/northbridge/amd/amdht/ht_wrapper.c b/src/northbridge/amd/amdht/ht_wrapper.c index 3bc236ed49..1f38b0c032 100644 --- a/src/northbridge/amd/amdht/ht_wrapper.c +++ b/src/northbridge/amd/amdht/ht_wrapper.c @@ -170,16 +170,22 @@ void amd_ht_fixup(struct sys_info *sysinfo) { printk(BIOS_DEBUG, "amd_ht_fixup()\n"); if (IS_ENABLED(CONFIG_CPU_AMD_MODEL_10XXX)) { uint8_t rev_gte_d = 0; + uint8_t fam15h = 0; uint8_t dual_node = 0; uint32_t f3xe8; uint32_t family; uint32_t model; family = model = cpuid_eax(0x80000001); - model = ((model & 0xf0000) >> 16) | ((model & 0xf0) >> 4); + model = ((model & 0xf0000) >> 12) | ((model & 0xf0) >> 4); + family = ((family & 0xf00000) >> 16) | ((family & 0xf00) >> 8); - if (model >= 0x8) - /* Revision D or later */ + if (family >= 0x6f) + /* Family 15h or later */ + fam15h = 1; + + if ((model >= 0x8) || fam15h) + /* Family 10h Revision D or later */ rev_gte_d = 1; if (rev_gte_d) { @@ -191,7 +197,8 @@ void amd_ht_fixup(struct sys_info *sysinfo) { if (dual_node) { /* Each G34 processor contains a defective HT link. - * See the BKDG Rev 3.62 section 2.7.1.5 for details. + * See the Family 10h BKDG Rev 3.62 section 2.7.1.5 for details + * For Family 15h see the BKDG Rev. 3.14 section 2.12.1.5 for details. */ uint8_t node; uint8_t node_count = get_nodes(); @@ -201,46 +208,46 @@ void amd_ht_fixup(struct sys_info *sysinfo) { uint8_t internal_node_number = ((f3xe8 & 0xc0000000) >> 30); printk(BIOS_DEBUG, "amd_ht_fixup(): node %d (internal node ID %d): disabling defective HT link\n", node, internal_node_number); if (internal_node_number == 0) { - uint8_t package_link_3_connected = pci_read_config32(NODE_PCI(node, 0), 0xd8) & 0x1; + uint8_t package_link_3_connected = pci_read_config32(NODE_PCI(node, 0), (fam15h)?0x98:0xd8) & 0x1; if (package_link_3_connected) { /* Set WidthIn and WidthOut to 0 */ - dword = pci_read_config32(NODE_PCI(node, 0), 0xc4); + dword = pci_read_config32(NODE_PCI(node, 0), (fam15h)?0x84:0xc4); dword &= ~0x77000000; - pci_write_config32(NODE_PCI(node, 0), 0xc4, dword); + pci_write_config32(NODE_PCI(node, 0), (fam15h)?0x84:0xc4, dword); /* Set Ganged to 1 */ - dword = pci_read_config32(NODE_PCI(node, 0), 0x178); + dword = pci_read_config32(NODE_PCI(node, 0), (fam15h)?0x170:0x178); dword |= 0x00000001; - pci_write_config32(NODE_PCI(node, 0), 0x178, dword); + pci_write_config32(NODE_PCI(node, 0), (fam15h)?0x170:0x178, dword); } else { /* Set ConnDly to 1 */ dword = pci_read_config32(NODE_PCI(node, 0), 0x16c); dword |= 0x00000100; pci_write_config32(NODE_PCI(node, 0), 0x16c, dword); /* Set TransOff and EndOfChain to 1 */ - dword = pci_read_config32(NODE_PCI(node, 4), 0xc4); + dword = pci_read_config32(NODE_PCI(node, 4), (fam15h)?0x84:0xc4); dword |= 0x000000c0; - pci_write_config32(NODE_PCI(node, 4), 0xc4, dword); + pci_write_config32(NODE_PCI(node, 4), (fam15h)?0x84:0xc4, dword); } } else if (internal_node_number == 1) { - uint8_t package_link_3_connected = pci_read_config32(NODE_PCI(node, 0), 0xb8) & 0x1; + uint8_t package_link_3_connected = pci_read_config32(NODE_PCI(node, 0), (fam15h)?0xf8:0xb8) & 0x1; if (package_link_3_connected) { /* Set WidthIn and WidthOut to 0 */ - dword = pci_read_config32(NODE_PCI(node, 0), 0xa4); + dword = pci_read_config32(NODE_PCI(node, 0), (fam15h)?0xe4:0xa4); dword &= ~0x77000000; - pci_write_config32(NODE_PCI(node, 0), 0xa4, dword); + pci_write_config32(NODE_PCI(node, 0), (fam15h)?0xe4:0xa4, dword); /* Set Ganged to 1 */ - dword = pci_read_config32(NODE_PCI(node, 0), 0x174); + dword = pci_read_config32(NODE_PCI(node, 0), (fam15h)?0x18c:0x174); dword |= 0x00000001; - pci_write_config32(NODE_PCI(node, 0), 0x174, dword); + pci_write_config32(NODE_PCI(node, 0), (fam15h)?0x18c:0x174, dword); } else { /* Set ConnDly to 1 */ dword = pci_read_config32(NODE_PCI(node, 0), 0x16c); dword |= 0x00000100; pci_write_config32(NODE_PCI(node, 0), 0x16c, dword); /* Set TransOff and EndOfChain to 1 */ - dword = pci_read_config32(NODE_PCI(node, 4), 0xa4); + dword = pci_read_config32(NODE_PCI(node, 4), (fam15h)?0xe4:0xa4); dword |= 0x000000c0; - pci_write_config32(NODE_PCI(node, 4), 0xa4, dword); + pci_write_config32(NODE_PCI(node, 4), (fam15h)?0xe4:0xa4, dword); } } } |