diff options
Diffstat (limited to 'src/northbridge/amd/amdfam10/raminit_amdmct.c')
| -rw-r--r-- | src/northbridge/amd/amdfam10/raminit_amdmct.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/src/northbridge/amd/amdfam10/raminit_amdmct.c b/src/northbridge/amd/amdfam10/raminit_amdmct.c index 8dee9ab814..4f31a5e848 100644 --- a/src/northbridge/amd/amdfam10/raminit_amdmct.c +++ b/src/northbridge/amd/amdfam10/raminit_amdmct.c @@ -150,8 +150,8 @@ uint16_t mct_MaxLoadFreq(uint8_t count, uint8_t highest_rank_count, uint8_t regi uint8_t MaxDimmsInstallable = 2; /* Return limited maximum RAM frequency */ - if (IS_ENABLED(CONFIG_DIMM_DDR2)) { - if (IS_ENABLED(CONFIG_DIMM_REGISTERED) && registered) { + if (CONFIG(DIMM_DDR2)) { + if (CONFIG(DIMM_REGISTERED) && registered) { /* K10 BKDG Rev. 3.62 Table 53 */ if (count > 2) { /* Limit to DDR2-533 */ @@ -170,7 +170,7 @@ uint16_t mct_MaxLoadFreq(uint8_t count, uint8_t highest_rank_count, uint8_t regi } } } - } else if (IS_ENABLED(CONFIG_DIMM_DDR3)) { + } else if (CONFIG(DIMM_DDR3)) { if (voltage == 0) { printk(BIOS_DEBUG, "%s: WARNING: Mainboard DDR3 voltage unknown, assuming 1.5V!\n", __func__); voltage = 0x1; @@ -179,7 +179,7 @@ uint16_t mct_MaxLoadFreq(uint8_t count, uint8_t highest_rank_count, uint8_t regi if (is_fam15h()) { if (CONFIG_CPU_SOCKET_TYPE == 0x15) { /* Socket G34 */ - if (IS_ENABLED(CONFIG_DIMM_REGISTERED) && registered) { + if (CONFIG(DIMM_REGISTERED) && registered) { /* Fam15h BKDG Rev. 3.14 Table 27 */ if (voltage & 0x4) { /* 1.25V */ @@ -317,7 +317,7 @@ uint16_t mct_MaxLoadFreq(uint8_t count, uint8_t highest_rank_count, uint8_t regi } } else if (CONFIG_CPU_SOCKET_TYPE == 0x14) { /* Socket C32 */ - if (IS_ENABLED(CONFIG_DIMM_REGISTERED) && registered) { + if (CONFIG(DIMM_REGISTERED) && registered) { /* Fam15h BKDG Rev. 3.14 Table 30 */ if (voltage & 0x4) { /* 1.25V */ @@ -486,7 +486,7 @@ uint16_t mct_MaxLoadFreq(uint8_t count, uint8_t highest_rank_count, uint8_t regi */ } } else { - if (IS_ENABLED(CONFIG_DIMM_REGISTERED) && registered) { + if (CONFIG(DIMM_REGISTERED) && registered) { /* K10 BKDG Rev. 3.62 Table 34 */ if (count > 2) { /* Limit to DDR3-800 */ @@ -548,7 +548,7 @@ void mctGet_DIMMAddr(struct DCTStatStruc *pDCTstat, u32 node) } -#if IS_ENABLED(CONFIG_SET_FIDVID) +#if CONFIG(SET_FIDVID) u8 mctGetProcessorPackageType(void) { /* FIXME: I guess this belongs wherever mctGetLogicalCPUID ends up ? */ u32 BrandId = cpuid_ebx(0x80000001); @@ -601,7 +601,7 @@ void amdmct_cbmem_store_info(struct sys_info *sysinfo) mem_info->ecc_scrub_rate = mctGet_NVbits(NV_DramBKScrub); /* Zero out invalid/unused pointers */ -#if IS_ENABLED(CONFIG_DIMM_DDR3) +#if CONFIG(DIMM_DDR3) for (i = 0; i < MAX_NODES_SUPPORTED; i++) { mem_info->dct_stat[i].C_MCTPtr = NULL; mem_info->dct_stat[i].C_DCTPtr[0] = NULL; |