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Diffstat (limited to 'src/northbridge/amd/amdfam10/amdfam10.h')
-rw-r--r--src/northbridge/amd/amdfam10/amdfam10.h7
1 files changed, 0 insertions, 7 deletions
diff --git a/src/northbridge/amd/amdfam10/amdfam10.h b/src/northbridge/amd/amdfam10/amdfam10.h
index 321e87d7d0..96938b2c63 100644
--- a/src/northbridge/amd/amdfam10/amdfam10.h
+++ b/src/northbridge/amd/amdfam10/amdfam10.h
@@ -922,13 +922,11 @@ that are corresponding to 0x01, 0x02, 0x03, 0x05, 0x06, 0x07
#include "nums.h"
-#ifdef __PRE_RAM__
#if NODE_NUMS == 64
#define NODE_PCI(x, fn) ((x < 32)?(PCI_DEV(CONFIG_CBB,(CONFIG_CDB+x),fn)):(PCI_DEV((CONFIG_CBB-1),(CONFIG_CDB+x-32),fn)))
#else
#define NODE_PCI(x, fn) PCI_DEV(CONFIG_CBB,(CONFIG_CDB+x),fn)
#endif
-#endif
/* Include wrapper for MCT (works for DDR2 or DDR3) */
#include <northbridge/amd/amdmct/wrappers/mcti.h>
@@ -989,11 +987,8 @@ struct sys_info {
struct DCTStatStruc DCTstatA[NODE_NUMS];
} __packed;
-#ifndef __PRE_RAM__
struct device *get_node_pci(u32 nodeid, u32 fn);
-#endif
-#ifdef __PRE_RAM__
void showallroutes(int level, pci_devfn_t dev);
void setup_resource_map_offset(const u32 *register_values, u32 max, u32
@@ -1017,8 +1012,6 @@ u32 get_sblk(void);
u8 get_sbbusn(u8 sblk);
void set_bios_reset(void);
-#endif
-
#include "northbridge/amd/amdht/porting.h"
BOOL AMD_CB_ManualBUIDSwapList(u8 Node, u8 Link, const u8 **List);