diff options
Diffstat (limited to 'src/northbridge/amd/agesa/state_machine.h')
| -rw-r--r-- | src/northbridge/amd/agesa/state_machine.h | 59 |
1 files changed, 59 insertions, 0 deletions
diff --git a/src/northbridge/amd/agesa/state_machine.h b/src/northbridge/amd/agesa/state_machine.h index 86424d1084..efa649688d 100644 --- a/src/northbridge/amd/agesa/state_machine.h +++ b/src/northbridge/amd/agesa/state_machine.h @@ -18,6 +18,10 @@ #include <stdint.h> #include <AGESA.h> +#include <AMD.h> + +#define HAS_LEGACY_WRAPPER (IS_ENABLED(CONFIG_AGESA_LEGACY_WRAPPER) || \ + IS_ENABLED(CONFIG_CPU_AMD_PI)) /* eventlog */ const char *agesa_struct_name(int state); @@ -25,8 +29,23 @@ const char *heap_status_name(int status); void agesawrapper_trace(AGESA_STATUS ret, AMD_CONFIG_PARAMS *StdHeader, const char *func); AGESA_STATUS agesawrapper_amdreadeventlog(UINT8 HeapStatus); +/* For suspend-to-ram support. */ + +#if !IS_ENABLED(CONFIG_CPU_AMD_PI) +/* TODO: With binaryPI we need different interface. */ +AGESA_STATUS OemInitResume(AMD_S3_PARAMS *dataBlock); +AGESA_STATUS OemS3LateRestore(AMD_S3_PARAMS *dataBlock); +AGESA_STATUS OemS3Save(AMD_S3_PARAMS *dataBlock); +#endif + +/* For FCH */ +static inline void fchs3earlyrestore(void) { } +static inline void fchs3laterestore(void) { } + struct sysinfo { + AMD_CONFIG_PARAMS StdHeader; + int s3resume; }; @@ -36,4 +55,44 @@ void agesa_postcar(struct sysinfo *cb); void board_BeforeAgesa(struct sysinfo *cb); void platform_once(struct sysinfo *cb); +void agesa_set_interface(struct sysinfo *cb); +int agesa_execute_state(struct sysinfo *cb, AGESA_STRUCT_NAME func); + +/* AGESA dispatchers */ + +AGESA_STATUS module_dispatch(AGESA_STRUCT_NAME func, AMD_CONFIG_PARAMS *StdHeader); + +void platform_BeforeInitReset(struct sysinfo *cb, AMD_RESET_PARAMS *Reset); +void board_BeforeInitReset(struct sysinfo *cb, AMD_RESET_PARAMS *Reset); + +void platform_BeforeInitEarly(struct sysinfo *cb, AMD_EARLY_PARAMS *Early); +void board_BeforeInitEarly(struct sysinfo *cb, AMD_EARLY_PARAMS *Early); + +/* Normal boot */ +void platform_BeforeInitPost(struct sysinfo *cb, AMD_POST_PARAMS *Post); +void board_BeforeInitPost(struct sysinfo *cb, AMD_POST_PARAMS *Post); +void platform_AfterInitPost(struct sysinfo *cb, AMD_POST_PARAMS *Post); + +void platform_BeforeInitEnv(struct sysinfo *cb, AMD_ENV_PARAMS *Env); +void board_BeforeInitEnv(struct sysinfo *cb, AMD_ENV_PARAMS *Env); +void platform_AfterInitEnv(struct sysinfo *cb, AMD_ENV_PARAMS *Env); + +void platform_BeforeInitMid(struct sysinfo *cb, AMD_MID_PARAMS *Mid); +void board_BeforeInitMid(struct sysinfo *cb, AMD_MID_PARAMS *Mid); + +void platform_AfterInitLate(struct sysinfo *cb, AMD_LATE_PARAMS *Late); +void completion_InitLate(struct sysinfo *cb, AMD_LATE_PARAMS *Late); + +/* S3 Resume */ +void platform_BeforeInitResume(struct sysinfo *cb, AMD_RESUME_PARAMS *Resume); +void platform_AfterInitResume(struct sysinfo *cb, AMD_RESUME_PARAMS *Resume); + +void platform_BeforeS3LateRestore(struct sysinfo *cb, AMD_S3LATE_PARAMS *S3Late); +void platform_AfterS3LateRestore(struct sysinfo *cb, AMD_S3LATE_PARAMS *S3Late); + +#if IS_ENABLED(CONFIG_CPU_AMD_PI_00660F01) +typedef void AMD_S3SAVE_PARAMS; +#endif +void platform_AfterS3Save(struct sysinfo *cb, AMD_S3SAVE_PARAMS *S3Save); + #endif /* _STATE_MACHINE_H_ */ |