diff options
Diffstat (limited to 'src/northbridge/amd/agesa/family15rl/Kconfig')
| -rw-r--r-- | src/northbridge/amd/agesa/family15rl/Kconfig | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/src/northbridge/amd/agesa/family15rl/Kconfig b/src/northbridge/amd/agesa/family15rl/Kconfig new file mode 100644 index 0000000000..2cf332a01a --- /dev/null +++ b/src/northbridge/amd/agesa/family15rl/Kconfig @@ -0,0 +1,42 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com> +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## +config NORTHBRIDGE_AMD_AGESA_FAMILY15_RL + bool + select MMCONF_SUPPORT + select PER_DEVICE_ACPI_TABLES + +if NORTHBRIDGE_AMD_AGESA_FAMILY15_RL + +config HW_MEM_HOLE_SIZEK + hex + default 0x100000 + +config HW_MEM_HOLE_SIZE_AUTO_INC + bool + default n + +config MMCONF_BASE_ADDRESS + hex + default 0xF8000000 + +config MMCONF_BUS_NUMBER + int + default 64 + +endif # NORTHBRIDGE_AMD_AGESA_FAMILY15_RL |