11 files changed, 0 insertions, 22 deletions
diff --git a/src/mainboard/asus/kgpe-d16/romstage.c b/src/mainboard/asus/kgpe-d16/romstage.c
index 6188fccb36..95fe630b9c 100644
--- a/src/mainboard/asus/kgpe-d16/romstage.c
+++ b/src/mainboard/asus/kgpe-d16/romstage.c
@@ -46,7 +46,6 @@
 #include <cpu/amd/family_10h-family_15h/init_cpus.h>
 #include <arch/early_variables.h>
 #include <cbmem.h>
-#include <security/tpm/tspi.h>
 
 #include "resourcemap.c"
 #include "cpu/amd/quadcore/quadcore.c"
@@ -624,9 +623,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	pci_write_config16(PCI_DEV(0, 0x14, 0), 0x54, 0x0707);
 	pci_write_config16(PCI_DEV(0, 0x14, 0), 0x56, 0x0bb0);
 	pci_write_config16(PCI_DEV(0, 0x14, 0), 0x5a, 0x0ff0);
-
-	if (IS_ENABLED(CONFIG_TPM1) || IS_ENABLED(CONFIG_TPM2))
-		tpm_setup(s3resume);
 }
 
 /**
diff --git a/src/mainboard/google/link/romstage.c b/src/mainboard/google/link/romstage.c
index d9f00f4bc3..d7bf7c1b63 100644
--- a/src/mainboard/google/link/romstage.c
+++ b/src/mainboard/google/link/romstage.c
@@ -35,7 +35,6 @@
 #include <arch/cpu.h>
 #include <cpu/x86/msr.h>
 #include <halt.h>
-#include <security/tpm/tspi.h>
 #include <cbfs.h>
 
 #include <southbridge/intel/bd82x6x/chip.h>
diff --git a/src/mainboard/google/parrot/romstage.c b/src/mainboard/google/parrot/romstage.c
index 6163c35e02..782d6e5654 100644
--- a/src/mainboard/google/parrot/romstage.c
+++ b/src/mainboard/google/parrot/romstage.c
@@ -35,7 +35,6 @@
 #include <cpu/x86/msr.h>
 #include <halt.h>
 #include <cbfs.h>
-#include <security/tpm/tspi.h>
 #include "ec/compal/ene932/ec.h"
 
 void pch_enable_lpc(void)
diff --git a/src/mainboard/google/rotor/Kconfig b/src/mainboard/google/rotor/Kconfig
index 7a864937d5..437fa02c18 100644
--- a/src/mainboard/google/rotor/Kconfig
+++ b/src/mainboard/google/rotor/Kconfig
@@ -20,8 +20,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select SOC_MARVELL_MVMAP2315
 	select MAINBOARD_HAS_CHROMEOS
 	select BOARD_ROMSIZE_KB_4096
-	select MAINBOARD_HAS_I2C_TPM_GENERIC
-	select MAINBOARD_HAS_TPM1
 
 config VBOOT
 	select VBOOT_MOCK_SECDATA
diff --git a/src/mainboard/google/stout/romstage.c b/src/mainboard/google/stout/romstage.c
index 36ebcf7d36..f64e0120bd 100644
--- a/src/mainboard/google/stout/romstage.c
+++ b/src/mainboard/google/stout/romstage.c
@@ -35,7 +35,6 @@
 #include <cpu/x86/msr.h>
 #include <halt.h>
 #include <bootmode.h>
-#include <security/tpm/tspi.h>
 #include <cbfs.h>
 #include <ec/quanta/it8518/ec.h>
 #include "ec.h"
diff --git a/src/mainboard/google/urara/Kconfig b/src/mainboard/google/urara/Kconfig
index 2c4431c829..3d415c4a3e 100644
--- a/src/mainboard/google/urara/Kconfig
+++ b/src/mainboard/google/urara/Kconfig
@@ -24,8 +24,6 @@ config BOARD_SPECIFIC_OPTIONS
 	select CPU_IMGTEC_PISTACHIO
 	select COMMON_CBFS_SPI_WRAPPER
 	select SPI_FLASH
-	select MAINBOARD_HAS_I2C_TPM_GENERIC
-	select MAINBOARD_HAS_TPM1
 
 config MAINBOARD_DIR
 	string
diff --git a/src/mainboard/intel/emeraldlake2/romstage.c b/src/mainboard/intel/emeraldlake2/romstage.c
index 9f46fe24e6..bdda191069 100644
--- a/src/mainboard/intel/emeraldlake2/romstage.c
+++ b/src/mainboard/intel/emeraldlake2/romstage.c
@@ -35,7 +35,6 @@
 #include <arch/cpu.h>
 #include <cpu/x86/msr.h>
 #include <halt.h>
-#include <security/tpm/tspi.h>
 
 #define SIO_PORT 0x164e
 
diff --git a/src/mainboard/lenovo/x201/romstage.c b/src/mainboard/lenovo/x201/romstage.c
index d93cb8c00e..d4c60dd521 100644
--- a/src/mainboard/lenovo/x201/romstage.c
+++ b/src/mainboard/lenovo/x201/romstage.c
@@ -35,7 +35,6 @@
 #include <timestamp.h>
 #include <arch/acpi.h>
 #include <cbmem.h>
-#include <security/tpm/tspi.h>
 
 #include "dock.h"
 #include "arch/early_variables.h"
@@ -282,7 +281,4 @@ void mainboard_romstage_entry(unsigned long bist)
 
 	if (!s3resume)
 		quick_ram_check();
-
-	if (IS_ENABLED(CONFIG_TPM1) || IS_ENABLED(CONFIG_TPM2))
-		tpm_setup(s3resume);
 }
diff --git a/src/mainboard/pcengines/apu2/romstage.c b/src/mainboard/pcengines/apu2/romstage.c
index 7ea89b8747..e35afc08d6 100644
--- a/src/mainboard/pcengines/apu2/romstage.c
+++ b/src/mainboard/pcengines/apu2/romstage.c
@@ -33,7 +33,6 @@
 #include <cpu/x86/lapic.h>
 #include <southbridge/amd/pi/hudson/hudson.h>
 #include <Fch/Fch.h>
-#include <security/tpm/tspi.h>
 
 #include "gpio_ftns.h"
 
@@ -103,9 +102,6 @@ void agesa_postcar(struct sysinfo *cb)
 	post_code(0x41);
 	AGESAWRAPPER(amdinitenv);
 
-	if (IS_ENABLED(CONFIG_TPM1) || IS_ENABLED(CONFIG_TPM2))
-		tpm_setup(false);
-
 	outb(0xEA, 0xCD6);
 	outb(0x1, 0xcd7);
 }
diff --git a/src/mainboard/samsung/lumpy/romstage.c b/src/mainboard/samsung/lumpy/romstage.c
index cea206a02b..3f655da936 100644
--- a/src/mainboard/samsung/lumpy/romstage.c
+++ b/src/mainboard/samsung/lumpy/romstage.c
@@ -28,7 +28,6 @@
 #include <cbmem.h>
 #include <console/console.h>
 #include <bootmode.h>
-#include <security/tpm/tspi.h>
 #include <northbridge/intel/sandybridge/sandybridge.h>
 #include <northbridge/intel/sandybridge/raminit.h>
 #include <northbridge/intel/sandybridge/raminit_native.h>
diff --git a/src/mainboard/samsung/stumpy/romstage.c b/src/mainboard/samsung/stumpy/romstage.c
index f502cc393f..ffaff42b72 100644
--- a/src/mainboard/samsung/stumpy/romstage.c
+++ b/src/mainboard/samsung/stumpy/romstage.c
@@ -37,7 +37,6 @@
 #include <arch/cpu.h>
 #include <cpu/x86/msr.h>
 #include <halt.h>
-#include <security/tpm/tspi.h>
 #if IS_ENABLED(CONFIG_DRIVERS_UART_8250IO)
 #include <superio/smsc/lpc47n207/lpc47n207.h>
 #endif