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-rw-r--r--src/mainboard/google/nyan/devicetree.cb2
-rw-r--r--src/mainboard/google/nyan_big/devicetree.cb2
-rw-r--r--src/mainboard/google/nyan_blaze/devicetree.cb2
3 files changed, 0 insertions, 6 deletions
diff --git a/src/mainboard/google/nyan/devicetree.cb b/src/mainboard/google/nyan/devicetree.cb
index 1031b029fe..5db8192ac9 100644
--- a/src/mainboard/google/nyan/devicetree.cb
+++ b/src/mainboard/google/nyan/devicetree.cb
@@ -32,8 +32,6 @@ chip soc/nvidia/tegra124
register "panel_bits_per_pixel" = "18"
- register "cache_policy" = "DCACHE_WRITETHROUGH"
-
# With some help from the mainbaord designer
register "backlight_en_gpio" = "GPIO(H2)"
register "lvds_shutdown_gpio" = "0"
diff --git a/src/mainboard/google/nyan_big/devicetree.cb b/src/mainboard/google/nyan_big/devicetree.cb
index 1031b029fe..5db8192ac9 100644
--- a/src/mainboard/google/nyan_big/devicetree.cb
+++ b/src/mainboard/google/nyan_big/devicetree.cb
@@ -32,8 +32,6 @@ chip soc/nvidia/tegra124
register "panel_bits_per_pixel" = "18"
- register "cache_policy" = "DCACHE_WRITETHROUGH"
-
# With some help from the mainbaord designer
register "backlight_en_gpio" = "GPIO(H2)"
register "lvds_shutdown_gpio" = "0"
diff --git a/src/mainboard/google/nyan_blaze/devicetree.cb b/src/mainboard/google/nyan_blaze/devicetree.cb
index 1031b029fe..5db8192ac9 100644
--- a/src/mainboard/google/nyan_blaze/devicetree.cb
+++ b/src/mainboard/google/nyan_blaze/devicetree.cb
@@ -32,8 +32,6 @@ chip soc/nvidia/tegra124
register "panel_bits_per_pixel" = "18"
- register "cache_policy" = "DCACHE_WRITETHROUGH"
-
# With some help from the mainbaord designer
register "backlight_en_gpio" = "GPIO(H2)"
register "lvds_shutdown_gpio" = "0"