summaryrefslogtreecommitdiff
path: root/src/mainboard
diff options
context:
space:
mode:
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/amd/gardenia/romstage.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/amd/gardenia/romstage.c b/src/mainboard/amd/gardenia/romstage.c
index c3e2aa4b62..eca9d3bd58 100644
--- a/src/mainboard/amd/gardenia/romstage.c
+++ b/src/mainboard/amd/gardenia/romstage.c
@@ -1,7 +1,7 @@
/*
* This file is part of the coreboot project.
*
- * Copyright (C) 2015 Advanced Micro Devices, Inc.
+ * Copyright (C) 2015-2016 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -33,8 +33,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
#endif
amd_initmmio();
-
hudson_lpc_port80();
+ hudson_lpc_decode();
if (!cpu_init_detectedx && boot_cpu()) {
post_code(0x30);